From 063f5056f23b7a3999016f6b60028bd724c3837b Mon Sep 17 00:00:00 2001 From: Kevin Le Date: Mon, 2 Feb 2026 11:21:00 +0700 Subject: [PATCH 01/10] Fixed RefCountedDigitalPin.h to release claim correctly. Ensure no negative claims number. --- src/helpers/RefCountedDigitalPin.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/helpers/RefCountedDigitalPin.h b/src/helpers/RefCountedDigitalPin.h index 753f6c30e9..4cf53cda4e 100644 --- a/src/helpers/RefCountedDigitalPin.h +++ b/src/helpers/RefCountedDigitalPin.h @@ -20,10 +20,12 @@ class RefCountedDigitalPin { digitalWrite(_pin, _active); } } + void release() { - _claims--; if (_claims == 0) { digitalWrite(_pin, !_active); + } else { + _claims--; } } }; From 39fb2902ec5653971a62fb308b9d2e56e77f7480 Mon Sep 17 00:00:00 2001 From: Kevin Le Date: Thu, 5 Feb 2026 22:42:02 +0700 Subject: [PATCH 02/10] Avoid negative _claims --- src/helpers/RefCountedDigitalPin.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/helpers/RefCountedDigitalPin.h b/src/helpers/RefCountedDigitalPin.h index 4cf53cda4e..f30c4c58be 100644 --- a/src/helpers/RefCountedDigitalPin.h +++ b/src/helpers/RefCountedDigitalPin.h @@ -22,10 +22,11 @@ class RefCountedDigitalPin { } void release() { + if (_claims == 0) return; // avoid negative _claims + + _claims--; if (_claims == 0) { digitalWrite(_pin, !_active); - } else { - _claims--; } } }; From f6603fe7a5edf8b8197e45b7e909c6e781507511 Mon Sep 17 00:00:00 2001 From: Kevin Le Date: Thu, 5 Feb 2026 23:26:08 +0700 Subject: [PATCH 03/10] Set back PIN_VEXT_EN_ACTIVE=HIGH --- variants/heltec_v4/platformio.ini | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/variants/heltec_v4/platformio.ini b/variants/heltec_v4/platformio.ini index c5011e0e9b..fdddcd5d0c 100644 --- a/variants/heltec_v4/platformio.ini +++ b/variants/heltec_v4/platformio.ini @@ -22,7 +22,7 @@ build_flags = -D P_LORA_PA_TX_EN=46 ; PA CPS - GC1109 TX PA full(High) / bypass(Low) -D PIN_USER_BTN=0 -D PIN_VEXT_EN=36 - -D PIN_VEXT_EN_ACTIVE=LOW + -D PIN_VEXT_EN_ACTIVE=HIGH -D LORA_TX_POWER=10 ;If it is configured as 10 here, the final output will be 22 dbm. -D MAX_LORA_TX_POWER=22 ; Max SX1262 output -D SX126X_REGISTER_PATCH=1 ; Patch register 0x8B5 for improved RX From 44b80d00c202a9783773086ef93f64bc0ce85457 Mon Sep 17 00:00:00 2001 From: Kevin Le Date: Thu, 5 Feb 2026 23:27:10 +0700 Subject: [PATCH 04/10] Disabled periph_power for Heltec v4's display --- variants/heltec_v4/target.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/variants/heltec_v4/target.cpp b/variants/heltec_v4/target.cpp index f971cc6085..54fc05e891 100644 --- a/variants/heltec_v4/target.cpp +++ b/variants/heltec_v4/target.cpp @@ -24,7 +24,7 @@ AutoDiscoverRTCClock rtc_clock(fallback_clock); #endif #ifdef DISPLAY_CLASS - DISPLAY_CLASS display(&(board.periph_power)); + DISPLAY_CLASS display(NULL); MomentaryButton user_btn(PIN_USER_BTN, 1000, true); #endif From 13d0dff9182bf7931b9b6c87b67d7e5120301099 Mon Sep 17 00:00:00 2001 From: Kevin Le Date: Wed, 18 Feb 2026 22:29:33 +0700 Subject: [PATCH 05/10] Reverted to use GPIO 17, 18 as I2C for Heltec v4 repeater --- variants/heltec_v4/platformio.ini | 2 -- 1 file changed, 2 deletions(-) diff --git a/variants/heltec_v4/platformio.ini b/variants/heltec_v4/platformio.ini index fdddcd5d0c..71ffc2e6a9 100644 --- a/variants/heltec_v4/platformio.ini +++ b/variants/heltec_v4/platformio.ini @@ -54,8 +54,6 @@ build_flags = -D PIN_BOARD_SDA=17 -D PIN_BOARD_SCL=18 -D PIN_OLED_RESET=21 - -D ENV_PIN_SDA=4 - -D ENV_PIN_SCL=3 build_src_filter= ${Heltec_lora32_v4.build_src_filter} lib_deps = ${Heltec_lora32_v4.lib_deps} From 8ad17d1022242ac066021778e5ca4b79c839225f Mon Sep 17 00:00:00 2001 From: enricolorenzoni59 Date: Sat, 28 Feb 2026 09:07:30 +0000 Subject: [PATCH 06/10] `gps sync` reply: fill buffer with text --- src/helpers/CommonCLI.cpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/helpers/CommonCLI.cpp b/src/helpers/CommonCLI.cpp index f2f961b93a..e20bbb1c02 100644 --- a/src/helpers/CommonCLI.cpp +++ b/src/helpers/CommonCLI.cpp @@ -717,6 +717,9 @@ void CommonCLI::handleCommand(uint32_t sender_timestamp, const char* command, ch LocationProvider * l = _sensors->getLocationProvider(); if (l != NULL) { l->syncTime(); + strcpy(reply, "ok"); + } else { + strcpy(reply, "gps provider not found"); } } else if (memcmp(command, "gps setloc", 10) == 0) { _prefs->node_lat = _sensors->node_lat; From 70f1ad4aebf22a70a663f310487bbb8eb167ddf8 Mon Sep 17 00:00:00 2001 From: Wessel Nieboer Date: Wed, 25 Feb 2026 00:26:38 +0100 Subject: [PATCH 07/10] Fix RAK3401 SKY66122-11 FEM control: enable CSD/CPS for proper PA and LNA operation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The RAK13302 1W module uses a Skyworks SKY66122-11 front-end module with three digital control pins (CSD, CTX, CPS) that must be actively driven by the host MCU. The previous code only managed CTX (GPIO 31) — toggling it for TX/RX — but never initialized CSD (GPIO 24) or CPS (GPIO 21), leaving them floating with no pull-up/pull-down resistors on the PCB. With floating CSD and CPS, the SKY66122 was in an undefined operating mode: - The 30 dB TX PA may not have been reliably engaging - The 16 dB RX LNA was never reliably active, degrading receive sensitivity --- variants/rak3401/RAK3401Board.cpp | 33 ++++++++++++++++++++++++++----- variants/rak3401/RAK3401Board.h | 9 +++++---- variants/rak3401/variant.h | 11 ++++++++--- 3 files changed, 41 insertions(+), 12 deletions(-) diff --git a/variants/rak3401/RAK3401Board.cpp b/variants/rak3401/RAK3401Board.cpp index b9431c929e..e2a9f318ca 100644 --- a/variants/rak3401/RAK3401Board.cpp +++ b/variants/rak3401/RAK3401Board.cpp @@ -23,10 +23,33 @@ void RAK3401Board::begin() { pinMode(PIN_3V3_EN, OUTPUT); digitalWrite(PIN_3V3_EN, HIGH); -#ifdef P_LORA_PA_EN - // Initialize RAK13302 1W LoRa transceiver module PA control pin + // Initialize SKY66122-11 FEM on the RAK13302 module. + // CSD (P0.24) and CPS (P0.21) must be HIGH for both TX and RX modes. + // CTX (P0.31) selects TX(HIGH) vs RX(LOW) and also enables the 5V boost + // converter that powers the PA section (VCC1/VCC2). + // The LNA section (VSUP1/VCC0) runs on 3.3V and works with boost off. + pinMode(P_LORA_PA_CSD, OUTPUT); + digitalWrite(P_LORA_PA_CSD, HIGH); // CSD=1: enable FEM + + pinMode(SX126X_POWER_EN, OUTPUT); + digitalWrite(SX126X_POWER_EN, HIGH); // CPS=1: enable TX/RX paths + pinMode(P_LORA_PA_EN, OUTPUT); - digitalWrite(P_LORA_PA_EN, LOW); // Start with PA disabled - delay(10); // Allow PA module to initialize + digitalWrite(P_LORA_PA_EN, LOW); // CTX=0: RX mode, boost off + + delay(1); // SKY66122 turn-on settling time +} + +#ifdef NRF52_POWER_MANAGEMENT +void RAK3401Board::initiateShutdown(uint8_t reason) { + // Put SKY66122 in guaranteed <1 uA shutdown (Mode 4: CSD=0, CTX=0, CPS=0) + digitalWrite(P_LORA_PA_EN, LOW); // CTX=0, boost off + digitalWrite(SX126X_POWER_EN, LOW); // CPS=0 + digitalWrite(P_LORA_PA_CSD, LOW); // CSD=0 + + // Disable 3V3 switched peripherals + digitalWrite(PIN_3V3_EN, LOW); + + enterSystemOff(reason); +} #endif -} \ No newline at end of file diff --git a/variants/rak3401/RAK3401Board.h b/variants/rak3401/RAK3401Board.h index 20edf9069e..8ca5b52eb2 100644 --- a/variants/rak3401/RAK3401Board.h +++ b/variants/rak3401/RAK3401Board.h @@ -38,13 +38,14 @@ class RAK3401Board : public NRF52BoardDCDC { return "RAK 3401"; } -#ifdef P_LORA_PA_EN + // SKY66122 FEM TX/RX switching via CTX pin. + // CTX=HIGH: TX mode + 5V boost ON (PA powered from VCC1/VCC2) + // CTX=LOW: RX mode + 5V boost OFF (LNA powered from VSUP1 at 3.3V) void onBeforeTransmit() override { - digitalWrite(P_LORA_PA_EN, HIGH); // Enable PA before transmission + digitalWrite(P_LORA_PA_EN, HIGH); // CTX=1: TX mode, boost on } void onAfterTransmit() override { - digitalWrite(P_LORA_PA_EN, LOW); // Disable PA after transmission to save power + digitalWrite(P_LORA_PA_EN, LOW); // CTX=0: RX mode, boost off } -#endif }; diff --git a/variants/rak3401/variant.h b/variants/rak3401/variant.h index 56fe081694..f2ef4ace86 100644 --- a/variants/rak3401/variant.h +++ b/variants/rak3401/variant.h @@ -147,8 +147,14 @@ static const uint8_t AREF = PIN_AREF; #define SX126X_BUSY (9) #define SX126X_RESET (4) -#define SX126X_POWER_EN (21) -// DIO2 controlls an antenna switch and the TCXO voltage is controlled by DIO3 +// SKY66122-11 FEM control pins (active HIGH, active LOW = shutdown <1uA) +// CSD+CPS must be HIGH for TX and RX; CTX selects TX(HIGH) vs RX(LOW) +// CTX also enables the 5V boost converter for the PA during TX +#define P_LORA_PA_CSD (24) // P0.24 -> SKY66122 CSD (pin 11) - FEM enable +#define SX126X_POWER_EN (21) // P0.21 -> SKY66122 CPS (pin 1) - path select +#define P_LORA_PA_EN (31) // P0.31 -> SKY66122 CTX (pin 2) - TX/RX + boost EN + +// DIO2 has a NC 0R footprint (R25) to CTX; not connected by default #define SX126X_DIO2_AS_RF_SWITCH #define SX126X_DIO3_TCXO_VOLTAGE 1.8 @@ -159,7 +165,6 @@ static const uint8_t AREF = PIN_AREF; #define P_LORA_DIO_1 SX126X_DIO1 #define P_LORA_BUSY SX126X_BUSY #define P_LORA_RESET SX126X_RESET -#define P_LORA_PA_EN 31 // enables 3.3V periphery like GPS or IO Module // Do not toggle this for GPS power savings From ac2aa03b0903200f81a0e6981d56e194a4ce8ae7 Mon Sep 17 00:00:00 2001 From: Wessel Nieboer Date: Wed, 25 Feb 2026 01:18:16 +0100 Subject: [PATCH 08/10] Add SX126X_REGISTER_PATCH for RAK3401 --- variants/rak3401/platformio.ini | 1 + 1 file changed, 1 insertion(+) diff --git a/variants/rak3401/platformio.ini b/variants/rak3401/platformio.ini index 7467ceb9c0..ecea031719 100644 --- a/variants/rak3401/platformio.ini +++ b/variants/rak3401/platformio.ini @@ -11,6 +11,7 @@ build_flags = ${nrf52_base.build_flags} -D LORA_TX_POWER=22 -D SX126X_CURRENT_LIMIT=140 -D SX126X_RX_BOOSTED_GAIN=1 + -D SX126X_REGISTER_PATCH=1 ; Patch register 0x8B5 for improved RX with SKY66122 FEM build_src_filter = ${nrf52_base.build_src_filter} +<../variants/rak3401> + From 5a5568ed56ac25d4de6e10e9d2cde07d6bf686c1 Mon Sep 17 00:00:00 2001 From: Wessel Nieboer Date: Thu, 26 Feb 2026 08:57:56 +0100 Subject: [PATCH 09/10] Drive CTX low first --- variants/rak3401/RAK3401Board.cpp | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/variants/rak3401/RAK3401Board.cpp b/variants/rak3401/RAK3401Board.cpp index e2a9f318ca..4c18c6dde3 100644 --- a/variants/rak3401/RAK3401Board.cpp +++ b/variants/rak3401/RAK3401Board.cpp @@ -28,15 +28,18 @@ void RAK3401Board::begin() { // CTX (P0.31) selects TX(HIGH) vs RX(LOW) and also enables the 5V boost // converter that powers the PA section (VCC1/VCC2). // The LNA section (VSUP1/VCC0) runs on 3.3V and works with boost off. + // + // Drive CTX LOW first to prevent transient TX mode (Mode 2) while CSD/CPS + // are being enabled — the RAK13302 has no pull-downs on these pins. + pinMode(P_LORA_PA_EN, OUTPUT); + digitalWrite(P_LORA_PA_EN, LOW); // CTX=0: RX mode, boost off + pinMode(P_LORA_PA_CSD, OUTPUT); digitalWrite(P_LORA_PA_CSD, HIGH); // CSD=1: enable FEM pinMode(SX126X_POWER_EN, OUTPUT); digitalWrite(SX126X_POWER_EN, HIGH); // CPS=1: enable TX/RX paths - pinMode(P_LORA_PA_EN, OUTPUT); - digitalWrite(P_LORA_PA_EN, LOW); // CTX=0: RX mode, boost off - delay(1); // SKY66122 turn-on settling time } From 49d831350171f0ee377a781cd646382b7988ab86 Mon Sep 17 00:00:00 2001 From: Wessel Nieboer Date: Fri, 27 Feb 2026 11:30:46 +0100 Subject: [PATCH 10/10] Fix pin mapping & TX switch (it's DIO2) --- variants/rak3401/RAK3401Board.cpp | 34 +++++++++++-------------------- variants/rak3401/RAK3401Board.h | 12 ++--------- variants/rak3401/variant.h | 17 ++++++++-------- 3 files changed, 23 insertions(+), 40 deletions(-) diff --git a/variants/rak3401/RAK3401Board.cpp b/variants/rak3401/RAK3401Board.cpp index 4c18c6dde3..33e1de4221 100644 --- a/variants/rak3401/RAK3401Board.cpp +++ b/variants/rak3401/RAK3401Board.cpp @@ -20,37 +20,27 @@ void RAK3401Board::begin() { Wire.begin(); + // PIN_3V3_EN (WB_IO2, P0.34) controls the 3V3_S switched peripheral rail + // AND the 5V boost regulator (U5) on the RAK13302 that powers the SKY66122 PA. + // Must stay HIGH during radio operation — do not toggle for power saving. pinMode(PIN_3V3_EN, OUTPUT); digitalWrite(PIN_3V3_EN, HIGH); - // Initialize SKY66122-11 FEM on the RAK13302 module. - // CSD (P0.24) and CPS (P0.21) must be HIGH for both TX and RX modes. - // CTX (P0.31) selects TX(HIGH) vs RX(LOW) and also enables the 5V boost - // converter that powers the PA section (VCC1/VCC2). - // The LNA section (VSUP1/VCC0) runs on 3.3V and works with boost off. - // - // Drive CTX LOW first to prevent transient TX mode (Mode 2) while CSD/CPS - // are being enabled — the RAK13302 has no pull-downs on these pins. - pinMode(P_LORA_PA_EN, OUTPUT); - digitalWrite(P_LORA_PA_EN, LOW); // CTX=0: RX mode, boost off - - pinMode(P_LORA_PA_CSD, OUTPUT); - digitalWrite(P_LORA_PA_CSD, HIGH); // CSD=1: enable FEM - + // Enable SKY66122-11 FEM on the RAK13302 module. + // CSD and CPS are tied together on the RAK13302 PCB, routed to IO3 (P0.21). + // HIGH = FEM active (LNA for RX, PA path available for TX). + // TX/RX switching (CTX) is handled by SX1262 DIO2 via SetDIO2AsRfSwitchCtrl. pinMode(SX126X_POWER_EN, OUTPUT); - digitalWrite(SX126X_POWER_EN, HIGH); // CPS=1: enable TX/RX paths - - delay(1); // SKY66122 turn-on settling time + digitalWrite(SX126X_POWER_EN, HIGH); + delay(1); // SKY66122 turn-on settling time (tON = 3us typ) } #ifdef NRF52_POWER_MANAGEMENT void RAK3401Board::initiateShutdown(uint8_t reason) { - // Put SKY66122 in guaranteed <1 uA shutdown (Mode 4: CSD=0, CTX=0, CPS=0) - digitalWrite(P_LORA_PA_EN, LOW); // CTX=0, boost off - digitalWrite(SX126X_POWER_EN, LOW); // CPS=0 - digitalWrite(P_LORA_PA_CSD, LOW); // CSD=0 + // Disable SKY66122 FEM (CSD+CPS LOW = shutdown, <1 uA) + digitalWrite(SX126X_POWER_EN, LOW); - // Disable 3V3 switched peripherals + // Disable 3V3 switched peripherals and 5V boost digitalWrite(PIN_3V3_EN, LOW); enterSystemOff(reason); diff --git a/variants/rak3401/RAK3401Board.h b/variants/rak3401/RAK3401Board.h index 8ca5b52eb2..3a080d5e2c 100644 --- a/variants/rak3401/RAK3401Board.h +++ b/variants/rak3401/RAK3401Board.h @@ -38,14 +38,6 @@ class RAK3401Board : public NRF52BoardDCDC { return "RAK 3401"; } - // SKY66122 FEM TX/RX switching via CTX pin. - // CTX=HIGH: TX mode + 5V boost ON (PA powered from VCC1/VCC2) - // CTX=LOW: RX mode + 5V boost OFF (LNA powered from VSUP1 at 3.3V) - void onBeforeTransmit() override { - digitalWrite(P_LORA_PA_EN, HIGH); // CTX=1: TX mode, boost on - } - - void onAfterTransmit() override { - digitalWrite(P_LORA_PA_EN, LOW); // CTX=0: RX mode, boost off - } + // TX/RX switching is handled by SX1262 DIO2 -> SKY66122 CTX (hardware-timed). + // No onBeforeTransmit/onAfterTransmit overrides needed. }; diff --git a/variants/rak3401/variant.h b/variants/rak3401/variant.h index f2ef4ace86..268aec5380 100644 --- a/variants/rak3401/variant.h +++ b/variants/rak3401/variant.h @@ -147,14 +147,15 @@ static const uint8_t AREF = PIN_AREF; #define SX126X_BUSY (9) #define SX126X_RESET (4) -// SKY66122-11 FEM control pins (active HIGH, active LOW = shutdown <1uA) -// CSD+CPS must be HIGH for TX and RX; CTX selects TX(HIGH) vs RX(LOW) -// CTX also enables the 5V boost converter for the PA during TX -#define P_LORA_PA_CSD (24) // P0.24 -> SKY66122 CSD (pin 11) - FEM enable -#define SX126X_POWER_EN (21) // P0.21 -> SKY66122 CPS (pin 1) - path select -#define P_LORA_PA_EN (31) // P0.31 -> SKY66122 CTX (pin 2) - TX/RX + boost EN - -// DIO2 has a NC 0R footprint (R25) to CTX; not connected by default +// SKY66122-11 FEM control on the RAK13302 module: +// CSD + CPS are tied together on the PCB, routed to WisBlock IO3 (P0.21). +// Setting IO3 HIGH enables the FEM (LNA for RX, PA path for TX). +// CTX is connected to SX1262 DIO2 — the radio handles TX/RX switching +// in hardware via SetDIO2AsRfSwitchCtrl (microsecond-accurate, no GPIO needed). +// The 5V boost for the PA is enabled by WB_IO2 (P0.34 = PIN_3V3_EN). +#define SX126X_POWER_EN (21) // P0.21 = IO3 -> SKY66122 CSD+CPS (FEM enable) + +// CTX is driven by SX1262 DIO2, not a GPIO #define SX126X_DIO2_AS_RF_SWITCH #define SX126X_DIO3_TCXO_VOLTAGE 1.8