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pxa27x_udc.c
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/*
* Handles the Intel 27x USB Device Controller (UDC)
*
* Inspired by original driver by Frank Becker, David Brownell, and others.
* Copyright (C) 2008 Robert Jarzmik
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/errno.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/list.h>
#include <linux/interrupt.h>
#include <linux/proc_fs.h>
#include <linux/clk.h>
#include <linux/irq.h>
#include <linux/gpio.h>
#include <linux/slab.h>
#include <asm/byteorder.h>
#include <mach/hardware.h>
#include <linux/usb.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <mach/udc.h>
#include "pxa27x_udc.h"
/*
* This driver handles the USB Device Controller (UDC) in Intel's PXA 27x
* series processors.
*
* Such controller drivers work with a gadget driver. The gadget driver
* returns descriptors, implements configuration and data protocols used
* by the host to interact with this device, and allocates endpoints to
* the different protocol interfaces. The controller driver virtualizes
* usb hardware so that the gadget drivers will be more portable.
*
* This UDC hardware wants to implement a bit too much USB protocol. The
* biggest issues are: that the endpoints have to be set up before the
* controller can be enabled (minor, and not uncommon); and each endpoint
* can only have one configuration, interface and alternative interface
* number (major, and very unusual). Once set up, these cannot be changed
* without a controller reset.
*
* The workaround is to setup all combinations necessary for the gadgets which
* will work with this driver. This is done in pxa_udc structure, statically.
* See pxa_udc, udc_usb_ep versus pxa_ep, and matching function find_pxa_ep.
* (You could modify this if needed. Some drivers have a "fifo_mode" module
* parameter to facilitate such changes.)
*
* The combinations have been tested with these gadgets :
* - zero gadget
* - file storage gadget
* - ether gadget
*
* The driver doesn't use DMA, only IO access and IRQ callbacks. No use is
* made of UDC's double buffering either. USB "On-The-Go" is not implemented.
*
* All the requests are handled the same way :
* - the drivers tries to handle the request directly to the IO
* - if the IO fifo is not big enough, the remaining is send/received in
* interrupt handling.
*/
#define DRIVER_VERSION "2008-04-18"
#define DRIVER_DESC "PXA 27x USB Device Controller driver"
static const char driver_name[] = "pxa27x_udc";
static struct pxa_udc *the_controller;
static void handle_ep(struct pxa_ep *ep);
/*
* Debug filesystem
*/
#ifdef CONFIG_USB_GADGET_DEBUG_FS
#include <linux/debugfs.h>
#include <linux/uaccess.h>
#include <linux/seq_file.h>
static int state_dbg_show(struct seq_file *s, void *p)
{
struct pxa_udc *udc = s->private;
int pos = 0, ret;
u32 tmp;
ret = -ENODEV;
if (!udc->driver)
goto out;
/* basic device status */
pos += seq_printf(s, DRIVER_DESC "\n"
"%s version: %s\nGadget driver: %s\n",
driver_name, DRIVER_VERSION,
udc->driver ? udc->driver->driver.name : "(none)");
tmp = udc_readl(udc, UDCCR);
pos += seq_printf(s,
"udccr=0x%0x(%s%s%s%s%s%s%s%s%s%s), "
"con=%d,inter=%d,altinter=%d\n", tmp,
(tmp & UDCCR_OEN) ? " oen":"",
(tmp & UDCCR_AALTHNP) ? " aalthnp":"",
(tmp & UDCCR_AHNP) ? " rem" : "",
(tmp & UDCCR_BHNP) ? " rstir" : "",
(tmp & UDCCR_DWRE) ? " dwre" : "",
(tmp & UDCCR_SMAC) ? " smac" : "",
(tmp & UDCCR_EMCE) ? " emce" : "",
(tmp & UDCCR_UDR) ? " udr" : "",
(tmp & UDCCR_UDA) ? " uda" : "",
(tmp & UDCCR_UDE) ? " ude" : "",
(tmp & UDCCR_ACN) >> UDCCR_ACN_S,
(tmp & UDCCR_AIN) >> UDCCR_AIN_S,
(tmp & UDCCR_AAISN) >> UDCCR_AAISN_S);
/* registers for device and ep0 */
pos += seq_printf(s, "udcicr0=0x%08x udcicr1=0x%08x\n",
udc_readl(udc, UDCICR0), udc_readl(udc, UDCICR1));
pos += seq_printf(s, "udcisr0=0x%08x udcisr1=0x%08x\n",
udc_readl(udc, UDCISR0), udc_readl(udc, UDCISR1));
pos += seq_printf(s, "udcfnr=%d\n", udc_readl(udc, UDCFNR));
pos += seq_printf(s, "irqs: reset=%lu, suspend=%lu, resume=%lu, "
"reconfig=%lu\n",
udc->stats.irqs_reset, udc->stats.irqs_suspend,
udc->stats.irqs_resume, udc->stats.irqs_reconfig);
ret = 0;
out:
return ret;
}
static int queues_dbg_show(struct seq_file *s, void *p)
{
struct pxa_udc *udc = s->private;
struct pxa_ep *ep;
struct pxa27x_request *req;
int pos = 0, i, maxpkt, ret;
ret = -ENODEV;
if (!udc->driver)
goto out;
/* dump endpoint queues */
for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
ep = &udc->pxa_ep[i];
maxpkt = ep->fifo_size;
pos += seq_printf(s, "%-12s max_pkt=%d %s\n",
EPNAME(ep), maxpkt, "pio");
if (list_empty(&ep->queue)) {
pos += seq_printf(s, "\t(nothing queued)\n");
continue;
}
list_for_each_entry(req, &ep->queue, queue) {
pos += seq_printf(s, "\treq %p len %d/%d buf %p\n",
&req->req, req->req.actual,
req->req.length, req->req.buf);
}
}
ret = 0;
out:
return ret;
}
static int eps_dbg_show(struct seq_file *s, void *p)
{
struct pxa_udc *udc = s->private;
struct pxa_ep *ep;
int pos = 0, i, ret;
u32 tmp;
ret = -ENODEV;
if (!udc->driver)
goto out;
ep = &udc->pxa_ep[0];
tmp = udc_ep_readl(ep, UDCCSR);
pos += seq_printf(s, "udccsr0=0x%03x(%s%s%s%s%s%s%s)\n", tmp,
(tmp & UDCCSR0_SA) ? " sa" : "",
(tmp & UDCCSR0_RNE) ? " rne" : "",
(tmp & UDCCSR0_FST) ? " fst" : "",
(tmp & UDCCSR0_SST) ? " sst" : "",
(tmp & UDCCSR0_DME) ? " dme" : "",
(tmp & UDCCSR0_IPR) ? " ipr" : "",
(tmp & UDCCSR0_OPC) ? " opc" : "");
for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
ep = &udc->pxa_ep[i];
tmp = i? udc_ep_readl(ep, UDCCR) : udc_readl(udc, UDCCR);
pos += seq_printf(s, "%-12s: "
"IN %lu(%lu reqs), OUT %lu(%lu reqs), "
"irqs=%lu, udccr=0x%08x, udccsr=0x%03x, "
"udcbcr=%d\n",
EPNAME(ep),
ep->stats.in_bytes, ep->stats.in_ops,
ep->stats.out_bytes, ep->stats.out_ops,
ep->stats.irqs,
tmp, udc_ep_readl(ep, UDCCSR),
udc_ep_readl(ep, UDCBCR));
}
ret = 0;
out:
return ret;
}
static int eps_dbg_open(struct inode *inode, struct file *file)
{
return single_open(file, eps_dbg_show, inode->i_private);
}
static int queues_dbg_open(struct inode *inode, struct file *file)
{
return single_open(file, queues_dbg_show, inode->i_private);
}
static int state_dbg_open(struct inode *inode, struct file *file)
{
return single_open(file, state_dbg_show, inode->i_private);
}
static const struct file_operations state_dbg_fops = {
.owner = THIS_MODULE,
.open = state_dbg_open,
.llseek = seq_lseek,
.read = seq_read,
.release = single_release,
};
static const struct file_operations queues_dbg_fops = {
.owner = THIS_MODULE,
.open = queues_dbg_open,
.llseek = seq_lseek,
.read = seq_read,
.release = single_release,
};
static const struct file_operations eps_dbg_fops = {
.owner = THIS_MODULE,
.open = eps_dbg_open,
.llseek = seq_lseek,
.read = seq_read,
.release = single_release,
};
static void pxa_init_debugfs(struct pxa_udc *udc)
{
struct dentry *root, *state, *queues, *eps;
root = debugfs_create_dir(udc->gadget.name, NULL);
if (IS_ERR(root) || !root)
goto err_root;
state = debugfs_create_file("udcstate", 0400, root, udc,
&state_dbg_fops);
if (!state)
goto err_state;
queues = debugfs_create_file("queues", 0400, root, udc,
&queues_dbg_fops);
if (!queues)
goto err_queues;
eps = debugfs_create_file("epstate", 0400, root, udc,
&eps_dbg_fops);
if (!eps)
goto err_eps;
udc->debugfs_root = root;
udc->debugfs_state = state;
udc->debugfs_queues = queues;
udc->debugfs_eps = eps;
return;
err_eps:
debugfs_remove(eps);
err_queues:
debugfs_remove(queues);
err_state:
debugfs_remove(root);
err_root:
dev_err(udc->dev, "debugfs is not available\n");
}
static void pxa_cleanup_debugfs(struct pxa_udc *udc)
{
debugfs_remove(udc->debugfs_eps);
debugfs_remove(udc->debugfs_queues);
debugfs_remove(udc->debugfs_state);
debugfs_remove(udc->debugfs_root);
udc->debugfs_eps = NULL;
udc->debugfs_queues = NULL;
udc->debugfs_state = NULL;
udc->debugfs_root = NULL;
}
#else
static inline void pxa_init_debugfs(struct pxa_udc *udc)
{
}
static inline void pxa_cleanup_debugfs(struct pxa_udc *udc)
{
}
#endif
/**
* is_match_usb_pxa - check if usb_ep and pxa_ep match
* @udc_usb_ep: usb endpoint
* @ep: pxa endpoint
* @config: configuration required in pxa_ep
* @interface: interface required in pxa_ep
* @altsetting: altsetting required in pxa_ep
*
* Returns 1 if all criteria match between pxa and usb endpoint, 0 otherwise
*/
static int is_match_usb_pxa(struct udc_usb_ep *udc_usb_ep, struct pxa_ep *ep,
int config, int interface, int altsetting)
{
if (usb_endpoint_num(&udc_usb_ep->desc) != ep->addr)
return 0;
if (usb_endpoint_dir_in(&udc_usb_ep->desc) != ep->dir_in)
return 0;
if (usb_endpoint_type(&udc_usb_ep->desc) != ep->type)
return 0;
if ((ep->config != config) || (ep->interface != interface)
|| (ep->alternate != altsetting))
return 0;
return 1;
}
/**
* find_pxa_ep - find pxa_ep structure matching udc_usb_ep
* @udc: pxa udc
* @udc_usb_ep: udc_usb_ep structure
*
* Match udc_usb_ep and all pxa_ep available, to see if one matches.
* This is necessary because of the strong pxa hardware restriction requiring
* that once pxa endpoints are initialized, their configuration is freezed, and
* no change can be made to their address, direction, or in which configuration,
* interface or altsetting they are active ... which differs from more usual
* models which have endpoints be roughly just addressable fifos, and leave
* configuration events up to gadget drivers (like all control messages).
*
* Note that there is still a blurred point here :
* - we rely on UDCCR register "active interface" and "active altsetting".
* This is a nonsense in regard of USB spec, where multiple interfaces are
* active at the same time.
* - if we knew for sure that the pxa can handle multiple interface at the
* same time, assuming Intel's Developer Guide is wrong, this function
* should be reviewed, and a cache of couples (iface, altsetting) should
* be kept in the pxa_udc structure. In this case this function would match
* against the cache of couples instead of the "last altsetting" set up.
*
* Returns the matched pxa_ep structure or NULL if none found
*/
static struct pxa_ep *find_pxa_ep(struct pxa_udc *udc,
struct udc_usb_ep *udc_usb_ep)
{
int i;
struct pxa_ep *ep;
int cfg = udc->config;
int iface = udc->last_interface;
int alt = udc->last_alternate;
if (udc_usb_ep == &udc->udc_usb_ep[0])
return &udc->pxa_ep[0];
for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
ep = &udc->pxa_ep[i];
if (is_match_usb_pxa(udc_usb_ep, ep, cfg, iface, alt))
return ep;
}
return NULL;
}
/**
* update_pxa_ep_matches - update pxa_ep cached values in all udc_usb_ep
* @udc: pxa udc
*
* Context: in_interrupt()
*
* Updates all pxa_ep fields in udc_usb_ep structures, if this field was
* previously set up (and is not NULL). The update is necessary is a
* configuration change or altsetting change was issued by the USB host.
*/
static void update_pxa_ep_matches(struct pxa_udc *udc)
{
int i;
struct udc_usb_ep *udc_usb_ep;
for (i = 1; i < NR_USB_ENDPOINTS; i++) {
udc_usb_ep = &udc->udc_usb_ep[i];
if (udc_usb_ep->pxa_ep)
udc_usb_ep->pxa_ep = find_pxa_ep(udc, udc_usb_ep);
}
}
/**
* pio_irq_enable - Enables irq generation for one endpoint
* @ep: udc endpoint
*/
static void pio_irq_enable(struct pxa_ep *ep)
{
struct pxa_udc *udc = ep->dev;
int index = EPIDX(ep);
u32 udcicr0 = udc_readl(udc, UDCICR0);
u32 udcicr1 = udc_readl(udc, UDCICR1);
if (index < 16)
udc_writel(udc, UDCICR0, udcicr0 | (3 << (index * 2)));
else
udc_writel(udc, UDCICR1, udcicr1 | (3 << ((index - 16) * 2)));
}
/**
* pio_irq_disable - Disables irq generation for one endpoint
* @ep: udc endpoint
*/
static void pio_irq_disable(struct pxa_ep *ep)
{
struct pxa_udc *udc = ep->dev;
int index = EPIDX(ep);
u32 udcicr0 = udc_readl(udc, UDCICR0);
u32 udcicr1 = udc_readl(udc, UDCICR1);
if (index < 16)
udc_writel(udc, UDCICR0, udcicr0 & ~(3 << (index * 2)));
else
udc_writel(udc, UDCICR1, udcicr1 & ~(3 << ((index - 16) * 2)));
}
/**
* udc_set_mask_UDCCR - set bits in UDCCR
* @udc: udc device
* @mask: bits to set in UDCCR
*
* Sets bits in UDCCR, leaving DME and FST bits as they were.
*/
static inline void udc_set_mask_UDCCR(struct pxa_udc *udc, int mask)
{
u32 udccr = udc_readl(udc, UDCCR);
udc_writel(udc, UDCCR,
(udccr & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS));
}
/**
* udc_clear_mask_UDCCR - clears bits in UDCCR
* @udc: udc device
* @mask: bit to clear in UDCCR
*
* Clears bits in UDCCR, leaving DME and FST bits as they were.
*/
static inline void udc_clear_mask_UDCCR(struct pxa_udc *udc, int mask)
{
u32 udccr = udc_readl(udc, UDCCR);
udc_writel(udc, UDCCR,
(udccr & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS));
}
/**
* ep_write_UDCCSR - set bits in UDCCSR
* @udc: udc device
* @mask: bits to set in UDCCR
*
* Sets bits in UDCCSR (UDCCSR0 and UDCCSR*).
*
* A specific case is applied to ep0 : the ACM bit is always set to 1, for
* SET_INTERFACE and SET_CONFIGURATION.
*/
static inline void ep_write_UDCCSR(struct pxa_ep *ep, int mask)
{
if (is_ep0(ep))
mask |= UDCCSR0_ACM;
udc_ep_writel(ep, UDCCSR, mask);
}
/**
* ep_count_bytes_remain - get how many bytes in udc endpoint
* @ep: udc endpoint
*
* Returns number of bytes in OUT fifos. Broken for IN fifos (-EOPNOTSUPP)
*/
static int ep_count_bytes_remain(struct pxa_ep *ep)
{
if (ep->dir_in)
return -EOPNOTSUPP;
return udc_ep_readl(ep, UDCBCR) & 0x3ff;
}
/**
* ep_is_empty - checks if ep has byte ready for reading
* @ep: udc endpoint
*
* If endpoint is the control endpoint, checks if there are bytes in the
* control endpoint fifo. If endpoint is a data endpoint, checks if bytes
* are ready for reading on OUT endpoint.
*
* Returns 0 if ep not empty, 1 if ep empty, -EOPNOTSUPP if IN endpoint
*/
static int ep_is_empty(struct pxa_ep *ep)
{
int ret;
if (!is_ep0(ep) && ep->dir_in)
return -EOPNOTSUPP;
if (is_ep0(ep))
ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR0_RNE);
else
ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNE);
return ret;
}
/**
* ep_is_full - checks if ep has place to write bytes
* @ep: udc endpoint
*
* If endpoint is not the control endpoint and is an IN endpoint, checks if
* there is place to write bytes into the endpoint.
*
* Returns 0 if ep not full, 1 if ep full, -EOPNOTSUPP if OUT endpoint
*/
static int ep_is_full(struct pxa_ep *ep)
{
if (is_ep0(ep))
return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_IPR);
if (!ep->dir_in)
return -EOPNOTSUPP;
return (!(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNF));
}
/**
* epout_has_pkt - checks if OUT endpoint fifo has a packet available
* @ep: pxa endpoint
*
* Returns 1 if a complete packet is available, 0 if not, -EOPNOTSUPP for IN ep.
*/
static int epout_has_pkt(struct pxa_ep *ep)
{
if (!is_ep0(ep) && ep->dir_in)
return -EOPNOTSUPP;
if (is_ep0(ep))
return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_OPC);
return (udc_ep_readl(ep, UDCCSR) & UDCCSR_PC);
}
/**
* set_ep0state - Set ep0 automata state
* @dev: udc device
* @state: state
*/
static void set_ep0state(struct pxa_udc *udc, int state)
{
struct pxa_ep *ep = &udc->pxa_ep[0];
char *old_stname = EP0_STNAME(udc);
udc->ep0state = state;
ep_dbg(ep, "state=%s->%s, udccsr0=0x%03x, udcbcr=%d\n", old_stname,
EP0_STNAME(udc), udc_ep_readl(ep, UDCCSR),
udc_ep_readl(ep, UDCBCR));
}
/**
* ep0_idle - Put control endpoint into idle state
* @dev: udc device
*/
static void ep0_idle(struct pxa_udc *dev)
{
set_ep0state(dev, WAIT_FOR_SETUP);
}
/**
* inc_ep_stats_reqs - Update ep stats counts
* @ep: physical endpoint
* @req: usb request
* @is_in: ep direction (USB_DIR_IN or 0)
*
*/
static void inc_ep_stats_reqs(struct pxa_ep *ep, int is_in)
{
if (is_in)
ep->stats.in_ops++;
else
ep->stats.out_ops++;
}
/**
* inc_ep_stats_bytes - Update ep stats counts
* @ep: physical endpoint
* @count: bytes transfered on endpoint
* @is_in: ep direction (USB_DIR_IN or 0)
*/
static void inc_ep_stats_bytes(struct pxa_ep *ep, int count, int is_in)
{
if (is_in)
ep->stats.in_bytes += count;
else
ep->stats.out_bytes += count;
}
/**
* pxa_ep_setup - Sets up an usb physical endpoint
* @ep: pxa27x physical endpoint
*
* Find the physical pxa27x ep, and setup its UDCCR
*/
static __init void pxa_ep_setup(struct pxa_ep *ep)
{
u32 new_udccr;
new_udccr = ((ep->config << UDCCONR_CN_S) & UDCCONR_CN)
| ((ep->interface << UDCCONR_IN_S) & UDCCONR_IN)
| ((ep->alternate << UDCCONR_AISN_S) & UDCCONR_AISN)
| ((EPADDR(ep) << UDCCONR_EN_S) & UDCCONR_EN)
| ((EPXFERTYPE(ep) << UDCCONR_ET_S) & UDCCONR_ET)
| ((ep->dir_in) ? UDCCONR_ED : 0)
| ((ep->fifo_size << UDCCONR_MPS_S) & UDCCONR_MPS)
| UDCCONR_EE;
udc_ep_writel(ep, UDCCR, new_udccr);
}
/**
* pxa_eps_setup - Sets up all usb physical endpoints
* @dev: udc device
*
* Setup all pxa physical endpoints, except ep0
*/
static __init void pxa_eps_setup(struct pxa_udc *dev)
{
unsigned int i;
dev_dbg(dev->dev, "%s: dev=%p\n", __func__, dev);
for (i = 1; i < NR_PXA_ENDPOINTS; i++)
pxa_ep_setup(&dev->pxa_ep[i]);
}
/**
* pxa_ep_alloc_request - Allocate usb request
* @_ep: usb endpoint
* @gfp_flags:
*
* For the pxa27x, these can just wrap kmalloc/kfree. gadget drivers
* must still pass correctly initialized endpoints, since other controller
* drivers may care about how it's currently set up (dma issues etc).
*/
static struct usb_request *
pxa_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
{
struct pxa27x_request *req;
req = kzalloc(sizeof *req, gfp_flags);
if (!req)
return NULL;
INIT_LIST_HEAD(&req->queue);
req->in_use = 0;
req->udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
return &req->req;
}
/**
* pxa_ep_free_request - Free usb request
* @_ep: usb endpoint
* @_req: usb request
*
* Wrapper around kfree to free _req
*/
static void pxa_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
{
struct pxa27x_request *req;
req = container_of(_req, struct pxa27x_request, req);
WARN_ON(!list_empty(&req->queue));
kfree(req);
}
/**
* ep_add_request - add a request to the endpoint's queue
* @ep: usb endpoint
* @req: usb request
*
* Context: ep->lock held
*
* Queues the request in the endpoint's queue, and enables the interrupts
* on the endpoint.
*/
static void ep_add_request(struct pxa_ep *ep, struct pxa27x_request *req)
{
if (unlikely(!req))
return;
ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req,
req->req.length, udc_ep_readl(ep, UDCCSR));
req->in_use = 1;
list_add_tail(&req->queue, &ep->queue);
pio_irq_enable(ep);
}
/**
* ep_del_request - removes a request from the endpoint's queue
* @ep: usb endpoint
* @req: usb request
*
* Context: ep->lock held
*
* Unqueue the request from the endpoint's queue. If there are no more requests
* on the endpoint, and if it's not the control endpoint, interrupts are
* disabled on the endpoint.
*/
static void ep_del_request(struct pxa_ep *ep, struct pxa27x_request *req)
{
if (unlikely(!req))
return;
ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req,
req->req.length, udc_ep_readl(ep, UDCCSR));
list_del_init(&req->queue);
req->in_use = 0;
if (!is_ep0(ep) && list_empty(&ep->queue))
pio_irq_disable(ep);
}
/**
* req_done - Complete an usb request
* @ep: pxa physical endpoint
* @req: pxa request
* @status: usb request status sent to gadget API
* @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
*
* Context: ep->lock held if flags not NULL, else ep->lock released
*
* Retire a pxa27x usb request. Endpoint must be locked.
*/
static void req_done(struct pxa_ep *ep, struct pxa27x_request *req, int status,
unsigned long *pflags)
{
unsigned long flags;
ep_del_request(ep, req);
if (likely(req->req.status == -EINPROGRESS))
req->req.status = status;
else
status = req->req.status;
if (status && status != -ESHUTDOWN)
ep_dbg(ep, "complete req %p stat %d len %u/%u\n",
&req->req, status,
req->req.actual, req->req.length);
if (pflags)
spin_unlock_irqrestore(&ep->lock, *pflags);
local_irq_save(flags);
req->req.complete(&req->udc_usb_ep->usb_ep, &req->req);
local_irq_restore(flags);
if (pflags)
spin_lock_irqsave(&ep->lock, *pflags);
}
/**
* ep_end_out_req - Ends endpoint OUT request
* @ep: physical endpoint
* @req: pxa request
* @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
*
* Context: ep->lock held or released (see req_done())
*
* Ends endpoint OUT request (completes usb request).
*/
static void ep_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req,
unsigned long *pflags)
{
inc_ep_stats_reqs(ep, !USB_DIR_IN);
req_done(ep, req, 0, pflags);
}
/**
* ep0_end_out_req - Ends control endpoint OUT request (ends data stage)
* @ep: physical endpoint
* @req: pxa request
* @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
*
* Context: ep->lock held or released (see req_done())
*
* Ends control endpoint OUT request (completes usb request), and puts
* control endpoint into idle state
*/
static void ep0_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req,
unsigned long *pflags)
{
set_ep0state(ep->dev, OUT_STATUS_STAGE);
ep_end_out_req(ep, req, pflags);
ep0_idle(ep->dev);
}
/**
* ep_end_in_req - Ends endpoint IN request
* @ep: physical endpoint
* @req: pxa request
* @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
*
* Context: ep->lock held or released (see req_done())
*
* Ends endpoint IN request (completes usb request).
*/
static void ep_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req,
unsigned long *pflags)
{
inc_ep_stats_reqs(ep, USB_DIR_IN);
req_done(ep, req, 0, pflags);
}
/**
* ep0_end_in_req - Ends control endpoint IN request (ends data stage)
* @ep: physical endpoint
* @req: pxa request
* @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
*
* Context: ep->lock held or released (see req_done())
*
* Ends control endpoint IN request (completes usb request), and puts
* control endpoint into status state
*/
static void ep0_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req,
unsigned long *pflags)
{
set_ep0state(ep->dev, IN_STATUS_STAGE);
ep_end_in_req(ep, req, pflags);
}
/**
* nuke - Dequeue all requests
* @ep: pxa endpoint
* @status: usb request status
*
* Context: ep->lock released
*
* Dequeues all requests on an endpoint. As a side effect, interrupts will be
* disabled on that endpoint (because no more requests).
*/
static void nuke(struct pxa_ep *ep, int status)
{
struct pxa27x_request *req;
unsigned long flags;
spin_lock_irqsave(&ep->lock, flags);
while (!list_empty(&ep->queue)) {
req = list_entry(ep->queue.next, struct pxa27x_request, queue);
req_done(ep, req, status, &flags);
}
spin_unlock_irqrestore(&ep->lock, flags);
}
/**
* read_packet - transfer 1 packet from an OUT endpoint into request
* @ep: pxa physical endpoint
* @req: usb request
*
* Takes bytes from OUT endpoint and transfers them info the usb request.
* If there is less space in request than bytes received in OUT endpoint,
* bytes are left in the OUT endpoint.
*
* Returns how many bytes were actually transfered
*/
static int read_packet(struct pxa_ep *ep, struct pxa27x_request *req)
{
u32 *buf;
int bytes_ep, bufferspace, count, i;
bytes_ep = ep_count_bytes_remain(ep);
bufferspace = req->req.length - req->req.actual;
buf = (u32 *)(req->req.buf + req->req.actual);
prefetchw(buf);
if (likely(!ep_is_empty(ep)))
count = min(bytes_ep, bufferspace);
else /* zlp */
count = 0;
for (i = count; i > 0; i -= 4)
*buf++ = udc_ep_readl(ep, UDCDR);
req->req.actual += count;
ep_write_UDCCSR(ep, UDCCSR_PC);
return count;
}
/**
* write_packet - transfer 1 packet from request into an IN endpoint
* @ep: pxa physical endpoint
* @req: usb request
* @max: max bytes that fit into endpoint
*
* Takes bytes from usb request, and transfers them into the physical
* endpoint. If there are no bytes to transfer, doesn't write anything
* to physical endpoint.
*
* Returns how many bytes were actually transfered.
*/
static int write_packet(struct pxa_ep *ep, struct pxa27x_request *req,
unsigned int max)
{
int length, count, remain, i;
u32 *buf;
u8 *buf_8;
buf = (u32 *)(req->req.buf + req->req.actual);
prefetch(buf);
length = min(req->req.length - req->req.actual, max);
req->req.actual += length;
remain = length & 0x3;
count = length & ~(0x3);
for (i = count; i > 0 ; i -= 4)
udc_ep_writel(ep, UDCDR, *buf++);
buf_8 = (u8 *)buf;
for (i = remain; i > 0; i--)
udc_ep_writeb(ep, UDCDR, *buf_8++);
ep_vdbg(ep, "length=%d+%d, udccsr=0x%03x\n", count, remain,
udc_ep_readl(ep, UDCCSR));
return length;
}
/**
* read_fifo - Transfer packets from OUT endpoint into usb request
* @ep: pxa physical endpoint
* @req: usb request
*
* Context: callable when in_interrupt()
*
* Unload as many packets as possible from the fifo we use for usb OUT
* transfers and put them into the request. Caller should have made sure
* there's at least one packet ready.
* Doesn't complete the request, that's the caller's job
*
* Returns 1 if the request completed, 0 otherwise
*/
static int read_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
{
int count, is_short, completed = 0;
while (epout_has_pkt(ep)) {
count = read_packet(ep, req);
inc_ep_stats_bytes(ep, count, !USB_DIR_IN);
is_short = (count < ep->fifo_size);
ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "",
&req->req, req->req.actual, req->req.length);
/* completion */
if (is_short || req->req.actual == req->req.length) {
completed = 1;
break;
}
/* finished that packet. the next one may be waiting... */
}
return completed;
}
/**
* write_fifo - transfer packets from usb request into an IN endpoint
* @ep: pxa physical endpoint
* @req: pxa usb request
*
* Write to an IN endpoint fifo, as many packets as possible.
* irqs will use this to write the rest later.
* caller guarantees at least one packet buffer is ready (or a zlp).
* Doesn't complete the request, that's the caller's job
*
* Returns 1 if request fully transfered, 0 if partial transfer
*/
static int write_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
{
unsigned max;
int count, is_short, is_last = 0, completed = 0, totcount = 0;
u32 udccsr;