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clockgen (when using sw_pll) doesnt handle usb frequency being different from SPDIF or ADAT frequency #509

@shuchitak

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@shuchitak

When using sw_pll in the clockgen code, if the usb_frequecny ends up being different from the digital frequency, the f_error calculation completely falls over.

short f_error = (int)actual_mclk_inc - (int)expected_mclk_inc;

expected_mclk_inc is calculated using mclks_per_sample, which uses the selected_mclk_rate and selected_sample_rate informed by EP0, so correspond to the USB rate.
actual_mclk_inc is based on the incoming digital samples, so correspond to the digital rate.

Subtracting one from the other leads to a very wrong f_error being fed to the sigma delta modulator.

This is a regression when compared to the CS2100 based implementation.

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