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crypto: it51xxx: Fix SHA-256 padding length field to 64-bi
The SHA-256 standard (FIPS 180-4) requires the total message length (L) in bits to be appended as a **64-bit big-endian integer**. The previous implementation incorrectly calculated and wrote only the lower **32 bits** of the length field (to W[15]), implicitly assuming the upper 32 bits (W[14]) were correctly zeroed. This commit updates `it51xxx_hash_handler()` to explicitly calculate the length using `uint64_t` and writes both the MSB (W[14]) and LSB (W[15]) words in big-endian format. This ensures standard compliance and correct hashing for all message lengths. Signed-off-by: Badr Bacem KAABIA <[email protected]>
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drivers/crypto/crypto_it51xxx_sha.c

Lines changed: 10 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -183,11 +183,17 @@ static int it51xxx_hash_handler(struct hash_ctx *ctx, struct hash_pkt *pkt, bool
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}
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/*
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* Since input data (big-endian) are copied 1byte by 1byte to
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* it51xxx memory (little-endian), so the bit length needs to
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* be transformed into big-endian format and then write to memory.
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* SHA-256 requires the message length (in bits) as a 64-bit big-endian
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* integer in the final 8 bytes (words 14 and 15). The message is stored
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* in little-endian memory, so conversion is necessary.
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*/
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chip_ctx.w_sha[15] = sys_cpu_to_be32(chip_ctx.total_len * 8);
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uint64_t bit_len = (uint64_t)chip_ctx.total_len * 8;
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// Word 14: Most Significant 32 bits
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chip_ctx.w_sha[14] = sys_cpu_to_be32((uint32_t)(bit_len >> 32));
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// Word 15: Least Significant 32 bits
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chip_ctx.w_sha[15] = sys_cpu_to_be32((uint32_t)(bit_len & 0xFFFFFFFFUL));
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/* HW automatically load 64Bytes data from DLM */
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sys_write8(IT51XXX_SHAEXEC_64_BYTE, IT51XXX_SHAECR);

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