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drivers: audio: Apply code formatting to DMIC, I2S, and Codec
Changes affect: - drivers: i2s_mcux_flexcomm, dmic_mcux and wm8904 - audio subsystem headers: i2s.h, codec.h, dmic.h No functional changes, formatting improvements only. Signed-off-by: Michal Chvatal <[email protected]>
1 parent 6bbd866 commit 474ffb3

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6 files changed

+309
-439
lines changed

6 files changed

+309
-439
lines changed

‎drivers/audio/dmic_mcux.c‎

Lines changed: 76 additions & 108 deletions
Original file line numberDiff line numberDiff line change
@@ -61,21 +61,18 @@ static int dmic_mcux_get_osr(uint32_t pcm_rate, uint32_t bit_clk, bool use_2fs)
6161
}
6262

6363
/* Gets hardware channel index from logical channel */
64-
static uint8_t dmic_mcux_hw_chan(struct mcux_dmic_drv_data *drv_data,
65-
uint8_t log_chan)
64+
static uint8_t dmic_mcux_hw_chan(struct mcux_dmic_drv_data *drv_data, uint8_t log_chan)
6665
{
6766
enum pdm_lr lr;
6867
uint8_t hw_chan;
6968

70-
dmic_parse_channel_map(drv_data->chan_map_lo,
71-
drv_data->chan_map_hi,
72-
log_chan, &hw_chan, &lr);
69+
dmic_parse_channel_map(drv_data->chan_map_lo, drv_data->chan_map_hi, log_chan, &hw_chan,
70+
&lr);
7371

7472
return hw_chan;
7573
}
7674

77-
static void dmic_mcux_activate_channels(struct mcux_dmic_drv_data *drv_data,
78-
bool enable)
75+
static void dmic_mcux_activate_channels(struct mcux_dmic_drv_data *drv_data, bool enable)
7976
{
8077

8178
/* PDM channel 0 must always be enabled, as the RM states:
@@ -112,27 +109,23 @@ static int dmic_mcux_enable_dma(struct mcux_dmic_drv_data *drv_data, bool enable
112109
if (enable) {
113110
ret = dma_start(pdm_channel->dma, pdm_channel->dma_chan);
114111
if (ret < 0) {
115-
LOG_ERR("Could not start DMA for HW channel %d",
116-
hw_chan);
112+
LOG_ERR("Could not start DMA for HW channel %d", hw_chan);
117113
return ret;
118114
}
119115
} else {
120116
if (dma_stop(pdm_channel->dma, pdm_channel->dma_chan)) {
121-
LOG_ERR("Error stopping DMA for HW channel %d",
122-
hw_chan);
117+
LOG_ERR("Error stopping DMA for HW channel %d", hw_chan);
123118
ret = -EIO;
124119
}
125120
}
126-
DMIC_EnableChannelDma(drv_data->base_address,
127-
(dmic_channel_t)hw_chan, enable);
121+
DMIC_EnableChannelDma(drv_data->base_address, (dmic_channel_t)hw_chan, enable);
128122
}
129123

130124
return ret;
131125
}
132126

133127
/* Helper to reload DMA engine for all active channels with new buffer */
134-
static void dmic_mcux_reload_dma(struct mcux_dmic_drv_data *drv_data,
135-
void *buffer)
128+
static void dmic_mcux_reload_dma(struct mcux_dmic_drv_data *drv_data, void *buffer)
136129
{
137130
int ret;
138131
uint8_t hw_chan;
@@ -151,8 +144,7 @@ static void dmic_mcux_reload_dma(struct mcux_dmic_drv_data *drv_data,
151144
pdm_channel = drv_data->pdm_channels[hw_chan];
152145
src = DMIC_FifoGetAddress(drv_data->base_address, hw_chan);
153146
dst = (uint32_t)(((uint16_t *)buffer) + chan);
154-
ret = dma_reload(pdm_channel->dma, pdm_channel->dma_chan,
155-
src, dst, dma_buf_size);
147+
ret = dma_reload(pdm_channel->dma, pdm_channel->dma_chan, src, dst, dma_buf_size);
156148
if (ret < 0) {
157149
LOG_ERR("Could not reload DMIC HW channel %d", hw_chan);
158150
return;
@@ -192,8 +184,8 @@ static int dmic_mcux_stop(struct mcux_dmic_drv_data *drv_data)
192184
return 0;
193185
}
194186

195-
static void dmic_mcux_dma_cb(const struct device *dev, void *user_data,
196-
uint32_t channel, int status)
187+
static void dmic_mcux_dma_cb(const struct device *dev, void *user_data, uint32_t channel,
188+
int status)
197189
{
198190

199191
struct mcux_dmic_drv_data *drv_data = (struct mcux_dmic_drv_data *)user_data;
@@ -230,8 +222,7 @@ static void dmic_mcux_dma_cb(const struct device *dev, void *user_data,
230222
/* Reload DMA */
231223
dmic_mcux_reload_dma(drv_data, done_buffer);
232224
/* Advance active buffer index */
233-
drv_data->active_buf_idx =
234-
dmic_mcux_next_buf_idx(drv_data->active_buf_idx);
225+
drv_data->active_buf_idx = dmic_mcux_next_buf_idx(drv_data->active_buf_idx);
235226
return;
236227
}
237228

@@ -253,8 +244,7 @@ static void dmic_mcux_dma_cb(const struct device *dev, void *user_data,
253244
/* Reload DMA */
254245
dmic_mcux_reload_dma(drv_data, done_buffer);
255246
/* Advance active buffer index */
256-
drv_data->active_buf_idx =
257-
dmic_mcux_next_buf_idx(drv_data->active_buf_idx);
247+
drv_data->active_buf_idx = dmic_mcux_next_buf_idx(drv_data->active_buf_idx);
258248
return;
259249
}
260250

@@ -314,10 +304,8 @@ static int dmic_mcux_setup_dma(const struct device *dev)
314304
* pdm0_l_s1, pdm0_r_s1, pdm1_r_s1, pdm1_l_s1, ...]
315305
* Each sample is 16 bits wide.
316306
*/
317-
blk_cfg[blk].dest_address =
318-
(uint32_t)(((uint16_t *)dma_buf) + chan);
319-
blk_cfg[blk].dest_scatter_interval =
320-
num_chan * sizeof(uint16_t);
307+
blk_cfg[blk].dest_address = (uint32_t)(((uint16_t *)dma_buf) + chan);
308+
blk_cfg[blk].dest_scatter_interval = num_chan * sizeof(uint16_t);
321309
blk_cfg[blk].dest_scatter_en = 1;
322310
blk_cfg[blk].source_addr_adj = DMA_ADDR_ADJ_NO_CHANGE;
323311
blk_cfg[blk].dest_addr_adj = DMA_ADDR_ADJ_INCREMENT;
@@ -355,8 +343,8 @@ static int dmic_mcux_setup_dma(const struct device *dev)
355343
}
356344

357345
/* Initializes a DMIC hardware channel */
358-
static int dmic_mcux_init_channel(const struct device *dev, uint32_t osr,
359-
uint8_t chan, enum pdm_lr lr)
346+
static int dmic_mcux_init_channel(const struct device *dev, uint32_t osr, uint8_t chan,
347+
enum pdm_lr lr)
360348
{
361349
struct mcux_dmic_drv_data *drv_data = dev->data;
362350

@@ -399,8 +387,7 @@ static int mcux_dmic_init(const struct device *dev)
399387
return 0;
400388
}
401389

402-
static int dmic_mcux_configure(const struct device *dev,
403-
struct dmic_cfg *config)
390+
static int dmic_mcux_configure(const struct device *dev, struct dmic_cfg *config)
404391
{
405392

406393
const struct mcux_dmic_cfg *drv_config = dev->config;
@@ -460,8 +447,7 @@ static int dmic_mcux_configure(const struct device *dev,
460447
return -ENOTSUP;
461448
}
462449

463-
ret = clock_control_get_rate(drv_config->clock_dev,
464-
drv_config->clock_name, &bit_clk_rate);
450+
ret = clock_control_get_rate(drv_config->clock_dev, drv_config->clock_name, &bit_clk_rate);
465451
if (ret < 0) {
466452
return ret;
467453
}
@@ -486,34 +472,27 @@ static int dmic_mcux_configure(const struct device *dev,
486472
drv_data->chan_map_hi = channel->req_chan_map_hi;
487473
for (uint8_t chan = 0; chan < channel->req_num_chan; chan += 2) {
488474
/* Get the channel map data for channel pair */
489-
dmic_parse_channel_map(channel->req_chan_map_lo,
490-
channel->req_chan_map_hi,
491-
chan, &hw_chan_0, &lr_0);
475+
dmic_parse_channel_map(channel->req_chan_map_lo, channel->req_chan_map_hi, chan,
476+
&hw_chan_0, &lr_0);
492477
if ((chan + 1) < channel->req_num_chan) {
493478
/* Paired channel is enabled */
494-
dmic_parse_channel_map(channel->req_chan_map_lo,
495-
channel->req_chan_map_hi,
479+
dmic_parse_channel_map(channel->req_chan_map_lo, channel->req_chan_map_hi,
496480
chan + 1, &hw_chan_1, &lr_1);
497481
/* Verify that paired channels use consecutive hardware index */
498-
if ((lr_0 == lr_1) ||
499-
(hw_chan_1 != (hw_chan_0 + 1))) {
482+
if ((lr_0 == lr_1) || (hw_chan_1 != (hw_chan_0 + 1))) {
500483
return -EINVAL;
501484
}
502485
}
503486
/* Configure selected channels in DMIC */
504-
ret = dmic_mcux_init_channel(dev, osr,
505-
dmic_mcux_hw_chan(drv_data, chan),
506-
lr_0);
487+
ret = dmic_mcux_init_channel(dev, osr, dmic_mcux_hw_chan(drv_data, chan), lr_0);
507488
if (ret < 0) {
508489
return ret;
509490
}
510491
channel->act_num_chan++;
511492
if ((chan + 1) < channel->req_num_chan) {
512493
/* Paired channel is enabled */
513494
ret = dmic_mcux_init_channel(dev, osr,
514-
dmic_mcux_hw_chan(drv_data,
515-
chan + 1),
516-
lr_1);
495+
dmic_mcux_hw_chan(drv_data, chan + 1), lr_1);
517496
if (ret < 0) {
518497
return ret;
519498
}
@@ -524,8 +503,8 @@ static int dmic_mcux_configure(const struct device *dev,
524503
channel->act_chan_map_lo = channel->req_chan_map_lo;
525504
channel->act_chan_map_hi = channel->req_chan_map_hi;
526505

527-
drv_data->mem_slab = stream->mem_slab;
528-
drv_data->block_size = stream->block_size;
506+
drv_data->mem_slab = stream->mem_slab;
507+
drv_data->block_size = stream->block_size;
529508
drv_data->act_num_chan = channel->act_num_chan;
530509
drv_data->dmic_state = DMIC_STATE_CONFIGURED;
531510

@@ -547,8 +526,7 @@ static int dmic_mcux_start(const struct device *dev)
547526

548527
for (uint32_t i = 0; i < CONFIG_DMIC_MCUX_DMA_BUFFERS; i++) {
549528
/* Allocate buffers for DMA */
550-
ret = k_mem_slab_alloc(drv_data->mem_slab,
551-
&drv_data->dma_bufs[i], K_NO_WAIT);
529+
ret = k_mem_slab_alloc(drv_data->mem_slab, &drv_data->dma_bufs[i], K_NO_WAIT);
552530
if (ret < 0) {
553531
LOG_ERR("failed to allocate buffer");
554532
return -ENOBUFS;
@@ -569,8 +547,7 @@ static int dmic_mcux_start(const struct device *dev)
569547
return 0;
570548
}
571549

572-
static int dmic_mcux_trigger(const struct device *dev,
573-
enum dmic_trigger cmd)
550+
static int dmic_mcux_trigger(const struct device *dev, enum dmic_trigger cmd)
574551
{
575552
struct mcux_dmic_drv_data *drv_data = dev->data;
576553

@@ -620,9 +597,8 @@ static int dmic_mcux_trigger(const struct device *dev,
620597
return 0;
621598
}
622599

623-
static int dmic_mcux_read(const struct device *dev,
624-
uint8_t stream,
625-
void **buffer, size_t *size, int32_t timeout)
600+
static int dmic_mcux_read(const struct device *dev, uint8_t stream, void **buffer, size_t *size,
601+
int32_t timeout)
626602
{
627603
struct mcux_dmic_drv_data *drv_data = dev->data;
628604
int ret;
@@ -661,7 +637,8 @@ static int dmic_mcux_get_caps(const struct device *dev, struct audio_caps *caps)
661637
/* Currently, driver supports only 16-bit samples */
662638
caps->supported_bit_widths = AUDIO_BIT_WIDTH_16;
663639
caps->min_num_buffers = CONFIG_DMIC_MCUX_DMA_BUFFERS;
664-
/* Workaround: Set to 10ms because MediaPipe library does not have a cap filter implemented yet */
640+
/* Workaround: Set to 10ms because MediaPipe library does not have a cap filter implemented
641+
* yet */
665642
caps->min_frame_interval = 10000; /* 10ms minimum */
666643
caps->max_frame_interval = 100000; /* 100ms maximum */
667644
caps->interleaved = true;
@@ -677,69 +654,60 @@ static const struct _dmic_ops dmic_ops = {
677654
};
678655

679656
/* Converts integer gainshift into 5 bit 2's complement value for GAINSHIFT reg */
680-
#define PDM_DMIC_GAINSHIFT(val) \
681-
(val >= 0) ? (val & 0xF) : (BIT(4) | (0x10 - (val & 0xF)))
657+
#define PDM_DMIC_GAINSHIFT(val) (val >= 0) ? (val & 0xF) : (BIT(4) | (0x10 - (val & 0xF)))
682658

683659
/* Defines structure for a given PDM channel node */
684-
#define PDM_DMIC_CHAN_DEFINE(pdm_node) \
685-
static struct mcux_dmic_pdm_chan \
686-
pdm_channel_##pdm_node = { \
687-
.dma = DEVICE_DT_GET(DT_DMAS_CTLR(pdm_node)), \
688-
.dma_chan = DT_DMAS_CELL_BY_IDX(pdm_node, 0, channel), \
689-
.dmic_channel_cfg = { \
690-
.gainshft = PDM_DMIC_GAINSHIFT(DT_PROP(pdm_node, \
691-
gainshift)), \
692-
.preac2coef = DT_ENUM_IDX(pdm_node, compensation_2fs), \
693-
.preac4coef = DT_ENUM_IDX(pdm_node, compensation_4fs), \
694-
.dc_cut_level = DT_ENUM_IDX(pdm_node, dc_cutoff), \
695-
.post_dc_gain_reduce = DT_PROP(pdm_node, dc_gain), \
696-
.sample_rate = kDMIC_PhyFullSpeed, \
697-
.saturate16bit = 1U, \
698-
}, \
660+
#define PDM_DMIC_CHAN_DEFINE(pdm_node) \
661+
static struct mcux_dmic_pdm_chan pdm_channel_##pdm_node = { \
662+
.dma = DEVICE_DT_GET(DT_DMAS_CTLR(pdm_node)), \
663+
.dma_chan = DT_DMAS_CELL_BY_IDX(pdm_node, 0, channel), \
664+
.dmic_channel_cfg = \
665+
{ \
666+
.gainshft = PDM_DMIC_GAINSHIFT(DT_PROP(pdm_node, gainshift)), \
667+
.preac2coef = DT_ENUM_IDX(pdm_node, compensation_2fs), \
668+
.preac4coef = DT_ENUM_IDX(pdm_node, compensation_4fs), \
669+
.dc_cut_level = DT_ENUM_IDX(pdm_node, dc_cutoff), \
670+
.post_dc_gain_reduce = DT_PROP(pdm_node, dc_gain), \
671+
.sample_rate = kDMIC_PhyFullSpeed, \
672+
.saturate16bit = 1U, \
673+
}, \
699674
};
700675

701676
/* Defines structures for all enabled PDM channels */
702-
#define PDM_DMIC_CHANNELS_DEFINE(idx) \
703-
DT_INST_FOREACH_CHILD_STATUS_OKAY(idx, PDM_DMIC_CHAN_DEFINE)
677+
#define PDM_DMIC_CHANNELS_DEFINE(idx) DT_INST_FOREACH_CHILD_STATUS_OKAY(idx, PDM_DMIC_CHAN_DEFINE)
704678

705679
/* Gets pointer for a given PDM channel node */
706-
#define PDM_DMIC_CHAN_GET(pdm_node) \
680+
#define PDM_DMIC_CHAN_GET(pdm_node) \
707681
COND_CODE_1(DT_NODE_HAS_STATUS_OKAY(pdm_node), \
708682
(&pdm_channel_##pdm_node), (NULL)),
709683

710684
/* Gets array of pointers to PDM channels */
711-
#define PDM_DMIC_CHANNELS_GET(idx) \
712-
DT_INST_FOREACH_CHILD(idx, PDM_DMIC_CHAN_GET)
713-
714-
#define MCUX_DMIC_DEVICE(idx) \
715-
PDM_DMIC_CHANNELS_DEFINE(idx); \
716-
static struct mcux_dmic_pdm_chan \
717-
*pdm_channels##idx[FSL_FEATURE_DMIC_CHANNEL_NUM] = { \
718-
PDM_DMIC_CHANNELS_GET(idx) \
719-
}; \
720-
K_MSGQ_DEFINE(dmic_msgq##idx, sizeof(void *), \
721-
CONFIG_DMIC_MCUX_QUEUE_SIZE, 1); \
722-
static struct mcux_dmic_drv_data mcux_dmic_data##idx = { \
723-
.pdm_channels = pdm_channels##idx, \
724-
.base_address = (DMIC_Type *) DT_INST_REG_ADDR(idx), \
725-
.dmic_state = DMIC_STATE_UNINIT, \
726-
.rx_queue = &dmic_msgq##idx, \
727-
.active_buf_idx = 0U, \
728-
}; \
729-
\
730-
PINCTRL_DT_INST_DEFINE(idx); \
731-
static struct mcux_dmic_cfg mcux_dmic_cfg##idx = { \
732-
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(idx), \
733-
.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(idx)), \
734-
.clock_name = (clock_control_subsys_t) \
735-
DT_INST_CLOCKS_CELL(idx, name), \
736-
.use2fs = DT_INST_PROP(idx, use2fs), \
737-
}; \
738-
\
739-
DEVICE_DT_INST_DEFINE(idx, mcux_dmic_init, NULL, \
740-
&mcux_dmic_data##idx, &mcux_dmic_cfg##idx, \
741-
POST_KERNEL, CONFIG_AUDIO_DMIC_INIT_PRIORITY, \
742-
&dmic_ops);
685+
#define PDM_DMIC_CHANNELS_GET(idx) DT_INST_FOREACH_CHILD(idx, PDM_DMIC_CHAN_GET)
686+
687+
#define MCUX_DMIC_DEVICE(idx) \
688+
PDM_DMIC_CHANNELS_DEFINE(idx); \
689+
static struct mcux_dmic_pdm_chan *pdm_channels##idx[FSL_FEATURE_DMIC_CHANNEL_NUM] = { \
690+
PDM_DMIC_CHANNELS_GET(idx)}; \
691+
K_MSGQ_DEFINE(dmic_msgq##idx, sizeof(void *), CONFIG_DMIC_MCUX_QUEUE_SIZE, 1); \
692+
static struct mcux_dmic_drv_data mcux_dmic_data##idx = { \
693+
.pdm_channels = pdm_channels##idx, \
694+
.base_address = (DMIC_Type *)DT_INST_REG_ADDR(idx), \
695+
.dmic_state = DMIC_STATE_UNINIT, \
696+
.rx_queue = &dmic_msgq##idx, \
697+
.active_buf_idx = 0U, \
698+
}; \
699+
\
700+
PINCTRL_DT_INST_DEFINE(idx); \
701+
static struct mcux_dmic_cfg mcux_dmic_cfg##idx = { \
702+
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(idx), \
703+
.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(idx)), \
704+
.clock_name = (clock_control_subsys_t)DT_INST_CLOCKS_CELL(idx, name), \
705+
.use2fs = DT_INST_PROP(idx, use2fs), \
706+
}; \
707+
\
708+
DEVICE_DT_INST_DEFINE(idx, mcux_dmic_init, NULL, &mcux_dmic_data##idx, \
709+
&mcux_dmic_cfg##idx, POST_KERNEL, CONFIG_AUDIO_DMIC_INIT_PRIORITY, \
710+
&dmic_ops);
743711

744712
/* Existing SoCs only have one PDM instance. */
745713
DT_INST_FOREACH_STATUS_OKAY(MCUX_DMIC_DEVICE)

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