@@ -56,9 +56,6 @@ LOG_MODULE_REGISTER(LOG_MODULE_NAME);
5656
5757static const struct device * eth_stm32_phy_dev = DEVICE_DT_GET (DT_INST_PHANDLE (0 , phy_handle ));
5858
59- #define ETH_STM32_AUTO_NEGOTIATION_ENABLE \
60- UTIL_NOT(DT_NODE_HAS_PROP(DT_INST_PHANDLE(0, phy_handle), fixed_link))
61-
6259#if DT_HAS_COMPAT_STATUS_OKAY (st_stm32h7_ethernet )
6360#define IS_ETH_DMATXDESC_OWN (dma_tx_desc ) (dma_tx_desc->DESC3 & \
6461 ETH_DMATXNDESCRF_OWN)
@@ -877,6 +874,65 @@ static void RISAF_Config(void)
877874}
878875#endif
879876
877+ #if defined(CONFIG_ETH_STM32_HAL_API_V1 )
878+ #define ETH_TIMEOUT_SWRESET 500000U
879+
880+ static int eth_stm32_init_v1_api (const struct device * dev )
881+ {
882+ struct eth_stm32_hal_dev_data * dev_data = dev -> data ;
883+ ETH_HandleTypeDef * heth = & dev_data -> heth ;
884+ uint32_t tmpreg1 = 0U ;
885+
886+ if (heth -> State == HAL_ETH_STATE_RESET ) {
887+ /* Allocate lock resource and initialize it */
888+ heth -> Lock = HAL_UNLOCKED ;
889+ }
890+
891+ /* Select MII or RMII Mode*/
892+ #ifdef SOC_SERIES_STM32F1X
893+ AFIO -> MAPR &= ~(AFIO_MAPR_MII_RMII_SEL );
894+ AFIO -> MAPR |= (uint32_t )heth -> Init .MediaInterface ;
895+ #else
896+ /* Enable SYSCFG Clock */
897+ __HAL_RCC_SYSCFG_CLK_ENABLE ();
898+
899+ /* Select MII or RMII Mode*/
900+ SYSCFG -> PMC &= ~(SYSCFG_PMC_MII_RMII_SEL );
901+ SYSCFG -> PMC |= (uint32_t )heth -> Init .MediaInterface ;
902+ #endif /* SOC_SERIES_STM32F1X */
903+
904+ /* Get the ETHERNET MACMIIAR value, this is responsible for mdio, so save it to restore it
905+ * later
906+ */
907+ tmpreg1 = (heth -> Instance )-> MACMIIAR ;
908+
909+ /* Ethernet Software reset */
910+ /* Set the SWR bit: resets all MAC subsystem internal registers and logic */
911+ /* After reset all the registers holds their respective reset values */
912+ (heth -> Instance )-> DMABMR |= ETH_DMABMR_SR ;
913+
914+ /* Wait for software reset */
915+ if (WAIT_FOR ((((heth -> Instance )-> DMABMR & ETH_DMABMR_SR ) == (uint32_t )RESET ),
916+ ETH_TIMEOUT_SWRESET , NULL ) == false) {
917+ heth -> State = HAL_ETH_STATE_TIMEOUT ;
918+ /* Process Unlocked */
919+ __HAL_UNLOCK (heth );
920+
921+ return - ETIMEDOUT ;
922+ }
923+
924+ (heth -> Instance )-> MACMIIAR = (uint32_t )tmpreg1 ;
925+
926+ /* Config MAC and DMA */
927+ ETH_MACDMAConfig (heth , ETH_SUCCESS );
928+
929+ /* Set ETH HAL State to Ready */
930+ heth -> State = HAL_ETH_STATE_READY ;
931+
932+ return HAL_OK ;
933+ }
934+ #endif /* CONFIG_ETH_STM32_HAL_API_V1 */
935+
880936static int eth_initialize (const struct device * dev )
881937{
882938 struct eth_stm32_hal_dev_data * dev_data ;
@@ -935,28 +991,10 @@ static int eth_initialize(const struct device *dev)
935991 heth -> Init .MACAddr = dev_data -> mac_addr ;
936992
937993#if defined(CONFIG_ETH_STM32_HAL_API_V1 )
938- HAL_StatusTypeDef hal_ret = HAL_OK ;
939-
940- if (!ETH_STM32_AUTO_NEGOTIATION_ENABLE ) {
941- struct phy_link_state state ;
942-
943- phy_get_link_state (eth_stm32_phy_dev , & state );
944-
945- heth -> Init .DuplexMode = PHY_LINK_IS_FULL_DUPLEX (state .speed ) ? ETH_MODE_FULLDUPLEX
946- : ETH_MODE_HALFDUPLEX ;
947- heth -> Init .Speed =
948- PHY_LINK_IS_SPEED_100M (state .speed ) ? ETH_SPEED_100M : ETH_SPEED_10M ;
949- }
950-
951- hal_ret = HAL_ETH_Init (heth );
952- if (hal_ret == HAL_TIMEOUT ) {
953- /* HAL Init time out. This could be linked to */
954- /* a recoverable error. Log the issue and continue */
955- /* driver initialisation */
956- LOG_WRN ("HAL_ETH_Init timed out (cable not connected?)" );
957- } else if (hal_ret != HAL_OK ) {
958- LOG_ERR ("HAL_ETH_Init failed: %d" , hal_ret );
959- return - EINVAL ;
994+ ret = eth_stm32_init_v1_api (dev );
995+ if (ret < 0 ) {
996+ LOG_ERR ("eth_init_v1_api failed: %d" , ret );
997+ return - EIO ;
960998 }
961999
9621000 /* Initialize semaphores */
@@ -1461,9 +1499,6 @@ static struct eth_stm32_hal_dev_data eth0_data = {
14611499 .Instance = (ETH_TypeDef * )DT_REG_ADDR (DT_INST_PARENT (0 )),
14621500 .Init = {
14631501#if defined(CONFIG_ETH_STM32_HAL_API_V1 )
1464- .AutoNegotiation = ETH_STM32_AUTO_NEGOTIATION_ENABLE ?
1465- ETH_AUTONEGOTIATION_ENABLE : ETH_AUTONEGOTIATION_DISABLE ,
1466- .PhyAddress = DT_REG_ADDR (DT_INST_PHANDLE (0 , phy_handle )),
14671502 .RxMode = ETH_RXINTERRUPT_MODE ,
14681503 .ChecksumMode = IS_ENABLED (CONFIG_ETH_STM32_HW_CHECKSUM ) ?
14691504 ETH_CHECKSUM_BY_HARDWARE : ETH_CHECKSUM_BY_SOFTWARE ,
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