|
| 1 | +/* |
| 2 | + * Copyright (c) 2024-2025 STMicroelectronics |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: Apache-2.0 |
| 5 | + */ |
| 6 | + |
| 7 | +/dts-v1/; |
| 8 | +#include <st/h7rs/stm32h7s7X8.dtsi> |
| 9 | +#include <st/h7/stm32h7s7l8hxh-pinctrl.dtsi> |
| 10 | +#include "arduino_r3_connector.dtsi" |
| 11 | +#include "zephyr/dt-bindings/display/panel.h" |
| 12 | +#include <zephyr/dt-bindings/input/input-event-codes.h> |
| 13 | + |
| 14 | +/ { |
| 15 | + chosen { |
| 16 | + zephyr,console = &uart4; |
| 17 | + zephyr,shell-uart = &uart4; |
| 18 | + zephyr,sram = &sram0; |
| 19 | + zephyr,display = <dc; |
| 20 | + zephyr,touch = &display_ctp; |
| 21 | + }; |
| 22 | + |
| 23 | + psram: memory@90000000 { |
| 24 | + compatible = "zephyr,memory-region"; |
| 25 | + reg = <0x90000000 DT_SIZE_M(32)>; |
| 26 | + zephyr,memory-region = "PSRAM"; |
| 27 | + zephyr,memory-attr = <DT_MEM_ARM_MPU_RAM>; |
| 28 | + }; |
| 29 | + |
| 30 | + leds { |
| 31 | + compatible = "gpio-leds"; |
| 32 | + |
| 33 | + green_led: led_1 { |
| 34 | + gpios = <&gpioo 1 GPIO_ACTIVE_LOW>; |
| 35 | + label = "User LD1"; |
| 36 | + }; |
| 37 | + |
| 38 | + orange_led: led_2 { |
| 39 | + gpios = <&gpioo 5 GPIO_ACTIVE_LOW>; |
| 40 | + label = "User LD2"; |
| 41 | + }; |
| 42 | + |
| 43 | + red_led: led_3 { |
| 44 | + gpios = <&gpiom 2 GPIO_ACTIVE_LOW>; |
| 45 | + label = "User LD3"; |
| 46 | + }; |
| 47 | + |
| 48 | + blue_led: led_4 { |
| 49 | + gpios = <&gpiom 3 GPIO_ACTIVE_LOW>; |
| 50 | + label = "User LD4"; |
| 51 | + }; |
| 52 | + }; |
| 53 | + |
| 54 | + gpio_keys { |
| 55 | + compatible = "gpio-keys"; |
| 56 | + |
| 57 | + user_button: button { |
| 58 | + label = "User"; |
| 59 | + gpios = <&gpioc 13 GPIO_ACTIVE_LOW>; |
| 60 | + zephyr,code = <INPUT_KEY_0>; |
| 61 | + }; |
| 62 | + }; |
| 63 | + |
| 64 | + aliases { |
| 65 | + led0 = &blue_led; |
| 66 | + sw0 = &user_button; |
| 67 | + watchdog0 = &iwdg; |
| 68 | + die-temp0 = &die_temp; |
| 69 | + volt-sensor0 = &vref; |
| 70 | + volt-sensor1 = &vbat; |
| 71 | + spi-flash0 = &mx66uw1g45; |
| 72 | + }; |
| 73 | + |
| 74 | + ext_flash_mem: memory@70000000 { |
| 75 | + compatible = "zephyr,memory-region"; |
| 76 | + reg = <0x70000000 DT_SIZE_M(64)>; |
| 77 | + zephyr,memory-region = "EXTMEM"; |
| 78 | + /* The ATTR_MPU_EXTMEM attribut causing a MPU FAULT */ |
| 79 | + zephyr,memory-attr = <DT_MEM_ARM(ATTR_MPU_IO)>; |
| 80 | + }; |
| 81 | +}; |
| 82 | + |
| 83 | +&clk_hsi48 { |
| 84 | + status = "okay"; |
| 85 | +}; |
| 86 | + |
| 87 | +&clk_lse { |
| 88 | + status = "okay"; |
| 89 | +}; |
| 90 | + |
| 91 | +&clk_hse { |
| 92 | + clock-frequency = <DT_FREQ_M(24)>; |
| 93 | + hse-bypass; /* X3 is a 24MHz oscillator on PH0 */ |
| 94 | + status = "okay"; |
| 95 | +}; |
| 96 | + |
| 97 | +&pll { |
| 98 | + div-m = <12>; |
| 99 | + mul-n = <250>; |
| 100 | + div-p = <2>; |
| 101 | + div-q = <2>; |
| 102 | + div-r = <2>; |
| 103 | + div-s = <2>; |
| 104 | + div-t = <2>; |
| 105 | + clocks = <&clk_hse>; |
| 106 | + status = "okay"; |
| 107 | +}; |
| 108 | + |
| 109 | +&pll3 { |
| 110 | + div-m = <12>; |
| 111 | + mul-n = <25>; |
| 112 | + div-r = <2>; |
| 113 | + clocks = <&clk_hse>; |
| 114 | + status = "okay"; |
| 115 | +}; |
| 116 | + |
| 117 | +&rcc { |
| 118 | + clocks = <&pll>; |
| 119 | + clock-frequency = <DT_FREQ_M(250)>; |
| 120 | + dcpre = <1>; |
| 121 | + hpre = <1>; |
| 122 | + ppre1 = <2>; |
| 123 | + ppre2 = <2>; |
| 124 | + ppre4 = <2>; |
| 125 | + ppre5 = <2>; |
| 126 | +}; |
| 127 | + |
| 128 | +&uart4 { |
| 129 | + pinctrl-0 = <&uart4_tx_pd1 &uart4_rx_pd0>; |
| 130 | + pinctrl-names = "default"; |
| 131 | + current-speed = <115200>; |
| 132 | + status = "okay"; |
| 133 | +}; |
| 134 | + |
| 135 | +&uart7 { |
| 136 | + pinctrl-0 = <&uart7_tx_pe8 &uart7_rx_pe7>; |
| 137 | + pinctrl-names = "default"; |
| 138 | + current-speed = <115200>; |
| 139 | + status = "okay"; |
| 140 | +}; |
| 141 | + |
| 142 | +&timers2 { |
| 143 | + st,prescaler = <10000>; |
| 144 | + status = "okay"; |
| 145 | + |
| 146 | + pwm2: pwm { |
| 147 | + status = "okay"; |
| 148 | + pinctrl-0 = <&tim2_ch4_pa3>; |
| 149 | + pinctrl-names = "default"; |
| 150 | + }; |
| 151 | +}; |
| 152 | + |
| 153 | +&timers3 { |
| 154 | + st,prescaler = <10000>; |
| 155 | + status = "okay"; |
| 156 | + |
| 157 | + pwm3: pwm { |
| 158 | + status = "okay"; |
| 159 | + pinctrl-0 = <&tim3_ch2_pb5>; |
| 160 | + pinctrl-names = "default"; |
| 161 | + }; |
| 162 | +}; |
| 163 | + |
| 164 | +&rng { |
| 165 | + status = "okay"; |
| 166 | +}; |
| 167 | + |
| 168 | +&iwdg { |
| 169 | + status = "okay"; |
| 170 | +}; |
| 171 | + |
| 172 | +&wwdg { |
| 173 | + status = "okay"; |
| 174 | +}; |
| 175 | + |
| 176 | +&adc1 { |
| 177 | + pinctrl-0 = <&adc1_inp6_pf12>; /* Arduino A3 */ |
| 178 | + pinctrl-names = "default"; |
| 179 | + st,adc-clock-source = "SYNC"; |
| 180 | + st,adc-prescaler = <4>; |
| 181 | + status = "okay"; |
| 182 | +}; |
| 183 | + |
| 184 | +&adc2 { |
| 185 | + pinctrl-0 = <&adc2_inp2_pf13>; /* Arduino A4 */ |
| 186 | + pinctrl-names = "default"; |
| 187 | + st,adc-clock-source = "SYNC"; |
| 188 | + st,adc-prescaler = <4>; |
| 189 | + status = "okay"; |
| 190 | +}; |
| 191 | + |
| 192 | +&spi4 { |
| 193 | + pinctrl-0 = <&spi4_nss_pe4 &spi4_sck_pe12 |
| 194 | + &spi4_miso_pe13 &spi4_mosi_pe14>; |
| 195 | + pinctrl-names = "default"; |
| 196 | + status = "okay"; |
| 197 | +}; |
| 198 | + |
| 199 | +&i2c1 { |
| 200 | + pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb9>; |
| 201 | + pinctrl-names = "default"; |
| 202 | + status = "okay"; |
| 203 | + |
| 204 | + display_ctp: gt911@5d { |
| 205 | + compatible = "goodix,gt911"; |
| 206 | + reg = <0x5d>; |
| 207 | + irq-gpios = <&gpioe 3 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; |
| 208 | + status = "okay"; |
| 209 | + }; |
| 210 | +}; |
| 211 | + |
| 212 | +&xspi1 { |
| 213 | + pinctrl-0 = <&xspim_p1_ncs1_po0 &xspim_p1_dqs0_po2 |
| 214 | + &xspim_p1_dqs1_po3 &xspim_p1_clk_po4 |
| 215 | + &xspim_p1_io0_pp0 &xspim_p1_io1_pp1 &xspim_p1_io2_pp2 |
| 216 | + &xspim_p1_io3_pp3 &xspim_p1_io4_pp4 &xspim_p1_io5_pp5 |
| 217 | + &xspim_p1_io6_pp6 &xspim_p1_io7_pp7 &xspim_p1_io8_pp8 |
| 218 | + &xspim_p1_io9_pp9 &xspim_p1_io10_pp10 &xspim_p1_io11_pp11 |
| 219 | + &xspim_p1_io12_pp12 &xspim_p1_io13_pp13 &xspim_p1_io14_pp14 |
| 220 | + &xspim_p1_io15_pp15>; |
| 221 | + |
| 222 | + pinctrl-names = "default"; |
| 223 | + status = "okay"; |
| 224 | + |
| 225 | + memc: aps256xxn-obr@0 { |
| 226 | + compatible = "st,stm32-xspi-psram"; |
| 227 | + reg = <0>; |
| 228 | + size = <DT_SIZE_M(256)>; /* 256 Mbits */ |
| 229 | + max-frequency = <DT_FREQ_M(200)>; |
| 230 | + fixed-latency; |
| 231 | + io-x16-mode; |
| 232 | + read-latency = <4>; |
| 233 | + write-latency = <1>; |
| 234 | + burst-length = <0>; |
| 235 | + st,csbound = <11>; |
| 236 | + status = "okay"; |
| 237 | + }; |
| 238 | +}; |
| 239 | + |
| 240 | +&flash0 { |
| 241 | + partitions { |
| 242 | + compatible = "fixed-partitions"; |
| 243 | + #address-cells = <1>; |
| 244 | + #size-cells = <1>; |
| 245 | + |
| 246 | + /* Set the partitions with first MB to make use of the whole Bank1 */ |
| 247 | + boot_partition: partition@0 { |
| 248 | + label = "mcuboot"; |
| 249 | + reg = <0x00000000 DT_SIZE_K(64)>; |
| 250 | + }; |
| 251 | + }; |
| 252 | +}; |
| 253 | + |
| 254 | +&xspi2 { |
| 255 | + pinctrl-0 = <&xspim_p2_clk_pn6 &xspim_p2_ncs1_pn1 |
| 256 | + &xspim_p2_io0_pn2 &xspim_p2_io1_pn3 |
| 257 | + &xspim_p2_io2_pn4 &xspim_p2_io3_pn5 |
| 258 | + &xspim_p2_io4_pn8 &xspim_p2_io5_pn9 |
| 259 | + &xspim_p2_io6_pn10 &xspim_p2_io7_pn11 |
| 260 | + &xspim_p2_dqs0_pn0>; |
| 261 | + pinctrl-names = "default"; |
| 262 | + |
| 263 | + status = "okay"; |
| 264 | + |
| 265 | + ext_flash_ctrl: xspi-nor-flash@0 { |
| 266 | + compatible = "st,stm32-xspi-nor"; |
| 267 | + reg = <0>; |
| 268 | + size = <DT_SIZE_M(1024)>; /* 1 Gbits */ |
| 269 | + ospi-max-frequency = <DT_FREQ_M(50)>; |
| 270 | + spi-bus-width = <XSPI_OCTO_MODE>; |
| 271 | + data-rate = <XSPI_DTR_TRANSFER>; |
| 272 | + four-byte-opcodes; |
| 273 | + status = "okay"; |
| 274 | + |
| 275 | + #address-cells = <1>; |
| 276 | + #size-cells = <1>; |
| 277 | + ranges = <0x0 0x70000000 DT_SIZE_M(128)>; |
| 278 | + |
| 279 | + ext_flash: mx66uw1g45: ext-flash@0 { |
| 280 | + compatible = "soc-nv-flash"; |
| 281 | + reg = <0x0 DT_SIZE_M(128)>; |
| 282 | + write-block-size = <1>; |
| 283 | + erase-block-size = <DT_SIZE_K(128)>; |
| 284 | + |
| 285 | + partitions { |
| 286 | + compatible = "fixed-partitions"; |
| 287 | + #address-cells = <1>; |
| 288 | + #size-cells = <1>; |
| 289 | + }; |
| 290 | + }; |
| 291 | + }; |
| 292 | +}; |
| 293 | + |
| 294 | +&die_temp { |
| 295 | + status = "okay"; |
| 296 | +}; |
| 297 | + |
| 298 | +&vref { |
| 299 | + status = "okay"; |
| 300 | +}; |
| 301 | + |
| 302 | +&vbat { |
| 303 | + status = "okay"; |
| 304 | +}; |
| 305 | + |
| 306 | +usb2: &usbotg_fs { |
| 307 | + pinctrl-0 = <&usb_otg_fs_dm_pm12 &usb_otg_fs_dp_pm11>; |
| 308 | + pinctrl-names = "default"; |
| 309 | + status = "okay"; |
| 310 | +}; |
| 311 | + |
| 312 | +zephyr_udc0: &usb2 {}; |
| 313 | + |
| 314 | +<dc { |
| 315 | + pinctrl-0 = <<dc_r0_pf9 <dc_r1_pf10 <dc_r2_pf0 <dc_r3_pb4 |
| 316 | + <dc_r4_pb3 <dc_r5_pa15 <dc_r6_pg1 <dc_r7_pg0 |
| 317 | + <dc_g0_pf7 <dc_g1_pf15 <dc_g2_pa1 <dc_g3_pa0 |
| 318 | + <dc_g4_pb13 <dc_g5_pb12 <dc_g6_pb11 <dc_g7_pb15 |
| 319 | + <dc_b0_pf11 <dc_b1_pg14 <dc_b2_pa12 <dc_b3_pa11 |
| 320 | + <dc_b4_pa10 <dc_b5_pa9 <dc_b6_pa8 <dc_b7_pa6 |
| 321 | + <dc_de_pb14 <dc_clk_pg13 <dc_hsync_pg2 <dc_vsync_pe11>; |
| 322 | + pinctrl-names = "default"; |
| 323 | + disp-on-gpios = <&gpioe 15 GPIO_ACTIVE_HIGH>; |
| 324 | + bl-ctrl-gpios = <&gpiog 15 GPIO_ACTIVE_HIGH>; |
| 325 | + |
| 326 | + status = "okay"; |
| 327 | + |
| 328 | + width = <800>; |
| 329 | + height = <480>; |
| 330 | + pixel-format = <PANEL_PIXEL_FORMAT_RGB_565>; |
| 331 | + |
| 332 | + display-timings { |
| 333 | + compatible = "zephyr,panel-timing"; |
| 334 | + de-active = <0>; |
| 335 | + pixelclk-active = <0>; |
| 336 | + hsync-active = <0>; |
| 337 | + vsync-active = <0>; |
| 338 | + hsync-len = <4>; |
| 339 | + vsync-len = <4>; |
| 340 | + hback-porch = <8>; |
| 341 | + vback-porch = <8>; |
| 342 | + hfront-porch = <8>; |
| 343 | + vfront-porch = <8>; |
| 344 | + }; |
| 345 | + |
| 346 | + def-back-color-red = <0xFF>; |
| 347 | + def-back-color-green = <0xFF>; |
| 348 | + def-back-color-blue = <0xFF>; |
| 349 | +}; |
0 commit comments