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boards: st: stm32h7s78_dk: Add ext_flash_app variant
Add ext_flash_app variant to stm32h7s78_dk to allow building application running on ext flash. Largely based on A.Jarmouni's work to enable the same on stm32h750_dk in PR 97037. Signed-off-by: Erwan Gouriou <[email protected]>
1 parent 534db77 commit e5f3c04

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-337
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# Copyright (c) 2024-2025 STMicroelectronics
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_STM32H7S78_DK_STM32H7S7XX_EXT_FLASH_APP
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choice BOOTLOADER
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default BOOTLOADER_MCUBOOT
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endchoice
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choice BOOT_SIGNATURE_TYPE
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default BOOT_SIGNATURE_TYPE_NONE
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endchoice
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choice MCUBOOT_MODE
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default MCUBOOT_MODE_DIRECT_XIP
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endchoice
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endif # BOARD_STM32H7S78_DK_STM32H7S7XX_EXT_FLASH_APP

boards/st/stm32h7s78_dk/board.cmake

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# keep first
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board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
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if(CONFIG_XIP AND (CONFIG_STM32_MEMMAP OR CONFIG_BOOTLOADER_MCUBOOT))
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if(CONFIG_STM32_MEMMAP OR CONFIG_BOOTLOADER_MCUBOOT)
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board_runner_args(stm32cubeprogrammer "--extload=MX66UW1G45G_STM32H7S78-DK.stldr")
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endif()
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boards/st/stm32h7s78_dk/board.yml

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vendor: st
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socs:
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- name: stm32h7s7xx
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variants:
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- name: ext_flash_app
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/*
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* Copyright (c) 2024-2025 STMicroelectronics
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <st/h7rs/stm32h7s7X8.dtsi>
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#include <st/h7/stm32h7s7l8hxh-pinctrl.dtsi>
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#include "arduino_r3_connector.dtsi"
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#include "zephyr/dt-bindings/display/panel.h"
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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/ {
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chosen {
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zephyr,console = &uart4;
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zephyr,shell-uart = &uart4;
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zephyr,sram = &sram0;
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zephyr,display = &ltdc;
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zephyr,touch = &display_ctp;
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};
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psram: memory@90000000 {
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compatible = "zephyr,memory-region";
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reg = <0x90000000 DT_SIZE_M(32)>;
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zephyr,memory-region = "PSRAM";
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zephyr,memory-attr = <DT_MEM_ARM_MPU_RAM>;
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};
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leds {
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compatible = "gpio-leds";
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green_led: led_1 {
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gpios = <&gpioo 1 GPIO_ACTIVE_LOW>;
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label = "User LD1";
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};
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orange_led: led_2 {
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gpios = <&gpioo 5 GPIO_ACTIVE_LOW>;
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label = "User LD2";
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};
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red_led: led_3 {
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gpios = <&gpiom 2 GPIO_ACTIVE_LOW>;
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label = "User LD3";
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};
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blue_led: led_4 {
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gpios = <&gpiom 3 GPIO_ACTIVE_LOW>;
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label = "User LD4";
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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user_button: button {
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label = "User";
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gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
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zephyr,code = <INPUT_KEY_0>;
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};
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};
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aliases {
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led0 = &blue_led;
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sw0 = &user_button;
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watchdog0 = &iwdg;
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die-temp0 = &die_temp;
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volt-sensor0 = &vref;
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volt-sensor1 = &vbat;
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spi-flash0 = &mx66uw1g45;
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};
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ext_flash_mem: memory@70000000 {
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compatible = "zephyr,memory-region";
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reg = <0x70000000 DT_SIZE_M(64)>;
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zephyr,memory-region = "EXTMEM";
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/* The ATTR_MPU_EXTMEM attribut causing a MPU FAULT */
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zephyr,memory-attr = <DT_MEM_ARM(ATTR_MPU_IO)>;
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};
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};
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&clk_hsi48 {
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status = "okay";
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};
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&clk_lse {
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status = "okay";
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};
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&clk_hse {
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clock-frequency = <DT_FREQ_M(24)>;
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hse-bypass; /* X3 is a 24MHz oscillator on PH0 */
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status = "okay";
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};
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&pll {
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div-m = <12>;
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mul-n = <250>;
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div-p = <2>;
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div-q = <2>;
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div-r = <2>;
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div-s = <2>;
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div-t = <2>;
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clocks = <&clk_hse>;
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status = "okay";
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};
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&pll3 {
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div-m = <12>;
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mul-n = <25>;
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div-r = <2>;
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clocks = <&clk_hse>;
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status = "okay";
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};
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&rcc {
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clocks = <&pll>;
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clock-frequency = <DT_FREQ_M(250)>;
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dcpre = <1>;
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hpre = <1>;
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ppre1 = <2>;
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ppre2 = <2>;
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ppre4 = <2>;
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ppre5 = <2>;
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};
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&uart4 {
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pinctrl-0 = <&uart4_tx_pd1 &uart4_rx_pd0>;
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pinctrl-names = "default";
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current-speed = <115200>;
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status = "okay";
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};
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&uart7 {
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pinctrl-0 = <&uart7_tx_pe8 &uart7_rx_pe7>;
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pinctrl-names = "default";
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current-speed = <115200>;
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status = "okay";
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};
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&timers2 {
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st,prescaler = <10000>;
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status = "okay";
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pwm2: pwm {
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status = "okay";
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pinctrl-0 = <&tim2_ch4_pa3>;
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pinctrl-names = "default";
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};
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};
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&timers3 {
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st,prescaler = <10000>;
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status = "okay";
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pwm3: pwm {
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status = "okay";
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pinctrl-0 = <&tim3_ch2_pb5>;
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pinctrl-names = "default";
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};
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};
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&rng {
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status = "okay";
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};
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&iwdg {
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status = "okay";
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};
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&wwdg {
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status = "okay";
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};
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&adc1 {
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pinctrl-0 = <&adc1_inp6_pf12>; /* Arduino A3 */
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pinctrl-names = "default";
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st,adc-clock-source = "SYNC";
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st,adc-prescaler = <4>;
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status = "okay";
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};
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&adc2 {
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pinctrl-0 = <&adc2_inp2_pf13>; /* Arduino A4 */
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pinctrl-names = "default";
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st,adc-clock-source = "SYNC";
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st,adc-prescaler = <4>;
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status = "okay";
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};
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&spi4 {
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pinctrl-0 = <&spi4_nss_pe4 &spi4_sck_pe12
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&spi4_miso_pe13 &spi4_mosi_pe14>;
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pinctrl-names = "default";
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status = "okay";
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};
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&i2c1 {
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pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb9>;
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pinctrl-names = "default";
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status = "okay";
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display_ctp: gt911@5d {
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compatible = "goodix,gt911";
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reg = <0x5d>;
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irq-gpios = <&gpioe 3 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
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status = "okay";
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};
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};
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&xspi1 {
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pinctrl-0 = <&xspim_p1_ncs1_po0 &xspim_p1_dqs0_po2
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&xspim_p1_dqs1_po3 &xspim_p1_clk_po4
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&xspim_p1_io0_pp0 &xspim_p1_io1_pp1 &xspim_p1_io2_pp2
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&xspim_p1_io3_pp3 &xspim_p1_io4_pp4 &xspim_p1_io5_pp5
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&xspim_p1_io6_pp6 &xspim_p1_io7_pp7 &xspim_p1_io8_pp8
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&xspim_p1_io9_pp9 &xspim_p1_io10_pp10 &xspim_p1_io11_pp11
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&xspim_p1_io12_pp12 &xspim_p1_io13_pp13 &xspim_p1_io14_pp14
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&xspim_p1_io15_pp15>;
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pinctrl-names = "default";
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status = "okay";
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memc: aps256xxn-obr@0 {
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compatible = "st,stm32-xspi-psram";
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reg = <0>;
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size = <DT_SIZE_M(256)>; /* 256 Mbits */
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max-frequency = <DT_FREQ_M(200)>;
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fixed-latency;
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io-x16-mode;
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read-latency = <4>;
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write-latency = <1>;
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burst-length = <0>;
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st,csbound = <11>;
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status = "okay";
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};
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};
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&flash0 {
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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/* Set the partitions with first MB to make use of the whole Bank1 */
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boot_partition: partition@0 {
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label = "mcuboot";
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reg = <0x00000000 DT_SIZE_K(64)>;
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};
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};
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};
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&xspi2 {
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pinctrl-0 = <&xspim_p2_clk_pn6 &xspim_p2_ncs1_pn1
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&xspim_p2_io0_pn2 &xspim_p2_io1_pn3
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&xspim_p2_io2_pn4 &xspim_p2_io3_pn5
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&xspim_p2_io4_pn8 &xspim_p2_io5_pn9
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&xspim_p2_io6_pn10 &xspim_p2_io7_pn11
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&xspim_p2_dqs0_pn0>;
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pinctrl-names = "default";
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status = "okay";
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ext_flash_ctrl: xspi-nor-flash@0 {
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compatible = "st,stm32-xspi-nor";
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reg = <0>;
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size = <DT_SIZE_M(1024)>; /* 1 Gbits */
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ospi-max-frequency = <DT_FREQ_M(50)>;
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spi-bus-width = <XSPI_OCTO_MODE>;
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data-rate = <XSPI_DTR_TRANSFER>;
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four-byte-opcodes;
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status = "okay";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x70000000 DT_SIZE_M(128)>;
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ext_flash: mx66uw1g45: ext-flash@0 {
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compatible = "soc-nv-flash";
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reg = <0x0 DT_SIZE_M(128)>;
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write-block-size = <1>;
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erase-block-size = <DT_SIZE_K(128)>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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};
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};
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&die_temp {
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status = "okay";
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};
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&vref {
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status = "okay";
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};
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&vbat {
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status = "okay";
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};
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usb2: &usbotg_fs {
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pinctrl-0 = <&usb_otg_fs_dm_pm12 &usb_otg_fs_dp_pm11>;
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pinctrl-names = "default";
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status = "okay";
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};
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zephyr_udc0: &usb2 {};
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&ltdc {
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pinctrl-0 = <&ltdc_r0_pf9 &ltdc_r1_pf10 &ltdc_r2_pf0 &ltdc_r3_pb4
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&ltdc_r4_pb3 &ltdc_r5_pa15 &ltdc_r6_pg1 &ltdc_r7_pg0
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&ltdc_g0_pf7 &ltdc_g1_pf15 &ltdc_g2_pa1 &ltdc_g3_pa0
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&ltdc_g4_pb13 &ltdc_g5_pb12 &ltdc_g6_pb11 &ltdc_g7_pb15
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&ltdc_b0_pf11 &ltdc_b1_pg14 &ltdc_b2_pa12 &ltdc_b3_pa11
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&ltdc_b4_pa10 &ltdc_b5_pa9 &ltdc_b6_pa8 &ltdc_b7_pa6
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&ltdc_de_pb14 &ltdc_clk_pg13 &ltdc_hsync_pg2 &ltdc_vsync_pe11>;
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pinctrl-names = "default";
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disp-on-gpios = <&gpioe 15 GPIO_ACTIVE_HIGH>;
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bl-ctrl-gpios = <&gpiog 15 GPIO_ACTIVE_HIGH>;
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status = "okay";
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width = <800>;
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height = <480>;
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pixel-format = <PANEL_PIXEL_FORMAT_RGB_565>;
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display-timings {
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compatible = "zephyr,panel-timing";
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de-active = <0>;
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pixelclk-active = <0>;
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hsync-active = <0>;
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vsync-active = <0>;
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hsync-len = <4>;
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vsync-len = <4>;
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hback-porch = <8>;
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vback-porch = <8>;
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hfront-porch = <8>;
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vfront-porch = <8>;
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};
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def-back-color-red = <0xFF>;
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def-back-color-green = <0xFF>;
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def-back-color-blue = <0xFF>;
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};

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