STM32: QSPI: Dual Flash mode not always supported

[erwango]

Discussed in #68423

^{Originally posted by tt0776 February 1, 2024}
Maybe a Q & A for @erwango ?

In advance a apology on the way doing this, I am new in reporting this kind of things.
A the issue text directed me to make a discussion first before continue, this is it :-)

---

qspi is failing in compile stm32l476xx + stm32l486xx

Reported error is
warning: implicit declaration of function 'HAL_QSPI_SetFlashID'

Is missing define of bits QUADSPI_CR_DFM (also missing QUADSPI_CR_FSEL ..)

• stm32l476xx.h
• stm32l486xx.h

Fix is needed to be added after
#define QUADSPI_CR_SSHIFT QUADSPI_CR_SSHIFT_Msk /*!< Sample Shift */

Fix is to place bits missing (Copied from stm32l496xx.h)

#define QUADSPI_CR_DFM_Pos             (6U)
#define QUADSPI_CR_DFM_Msk             (0x1UL << QUADSPI_CR_DFM_Pos)           /*!< 0x00000040 */
#define QUADSPI_CR_DFM                 QUADSPI_CR_DFM_Msk                      /*!< Dual-flash mode */
#define QUADSPI_CR_FSEL_Pos            (7U)
#define QUADSPI_CR_FSEL_Msk            (0x1UL << QUADSPI_CR_FSEL_Pos)          /*!< 0x00000080 */
#define QUADSPI_CR_FSEL                QUADSPI_CR_FSEL_Msk                     /*!< Flash memory selection */

That result is tested to work on board stm32l476g_disco

Still having what looks to be a known warning and I see it also when compiling on other ST boards.
Looks to works anyway on my stm32l476g_disco

Warning (spi_bus_bridge): /soc/quadspi@a0001000: node name for SPI buses should be 'spi'
<stdout>: Warning (spi_bus_reg): Failed prerequisite 'spi_bus_bridge'

There is 2.6 QUADSPI errata.
Not sure it is a valide reason for not including bits and the option for getting samples working :-)

Using sample samples/drivers/spi_flash

*** Booting Zephyr OS build zephyr-v3.5.0 ***

qspi-nor-flash@0 SPI flash testing
==========================

Perform test on single sector
Test 1: Flash erase
Flash erase succeeded!

Test 2: Flash write
Attempting to write 4 bytes
Data read matches data written. Good!!

Perform test on multiple consequtive sectors
Test 1: Flash erase
Flash erase succeeded!

Test 2: Flash write
Attempting to write 4 bytes at offset 0xff000
Data read matches data written. Good!!
Attempting to write 4 bytes at offset 0x100000
Data read matches data written. Good!!

"stm32l476g_disco.conf" added to "boards" in sample
CONFIG_SPI=n

"stm32l476g_disco.overlay" added to board in sample

/ {

    chosen {
		zephyr,flash-controller = &n25q128a1;
	};

    aliases {
		spi-flash0 = &n25q128a1; 
	};
};


&dma2 {
	status = "okay";
};

&quadspi {
	pinctrl-0 = <&quadspi_bk1_io0_pe12 &quadspi_bk1_io1_pe13
				&quadspi_bk1_io2_pe14 &quadspi_bk1_io3_pe15
				&quadspi_ncs_pe11 &quadspi_clk_pe10>;
	pinctrl-names = "default";
	
	// Copied from stm32l496 that had the STM32_DMA_.. values as 0x480>; 
	dmas = <&dma2 7 3 (STM32_DMA_PERIPH_TX | STM32_DMA_PERIPH_RX | STM32_DMA_PRIORITY_HIGH)>; /* channel 7 request 3 on DMA2 */
	dma-names = "tx_rx";

	flash-id = <1>;
	status = "okay";
	
    n25q128a1: qspi-nor-flash@0 {
		compatible = "st,stm32-qspi-nor";
		reg = <0>;
		qspi-max-frequency = <DT_FREQ_M(108)>;
		size = <DT_SIZE_M(128)>; /* 16 MBytes */
		status = "okay";
		spi-bus-width = <4>;
		
		// Was original writeoc = "PP_1_4_4", the stm32l476g_disco only worke with PP_1_1_4 ;
		writeoc = "PP_1_1_4"; 
	};

    partitions {
         compatible = "fixed-partitions";
         #address-cells = <1>;
         #size-cells = <1>;

         partition@0 {
             label = "nor";
             reg = <0x00000000 DT_SIZE_M(4)>;
         };
 	};
};

[erwango]

Ok, got it.

So the actual issue is that QSPI Dual Flash mode is not supported on L47x/L48x devices, this is why HAL_QSPI_SetFlashID is not available on this target. Issue happens because drivzer was initialy developped on DFM enabled devices with HAL_QSPI_SetFlashID available by default.
Way to solve this is to add a dt property indicating that device supports DFM, and then make DFM related operations like setting flash id conditional on this property.
It happens that @FRASTM is working around this whole feature and will be able to provide a fix soon.

I'm converting this into an issue.

[FRASTM]

I put a commit 712aa5a68af6a10d69e3ccfcd50ba6ec833ee05a in my PR #68607 to accept the DualFlash Mode of dual qspi configuration (when the DTS has no )

[erwango]

Converting to enhancement.

[FRASTM]

The stm32L47x and stm32L48x does NOT support the Dual-flash Mode
Refer to the RM0351

So we cannot ask for QUADSPI_CR_DFM QUADSPI_CR_FSEL bits for the stm32L476x or stm32L486x
--> The &quadspi node of one of those mcu is not supposed to have a flash-id property : there is only one set of pins to address the quad-spi flash.

[FRASTM]

However we could still add a check on bitfield QUADSPI_CR_FSEL

diff --git a/drivers/flash/flash_stm32_qspi.c b/drivers/flash/flash_stm32_qspi.c
index 326c1129a36..6c6ab7fd6cf 100644
--- a/drivers/flash/flash_stm32_qspi.c
+++ b/drivers/flash/flash_stm32_qspi.c
@@ -1283,7 +1283,8 @@ static int flash_stm32_qspi_init(const struct device *dev)
 
 	HAL_QSPI_Init(&dev_data->hqspi);
 
-#if DT_NODE_HAS_PROP(DT_NODELABEL(quadspi), flash_id)
+#if DT_NODE_HAS_PROP(DT_NODELABEL(quadspi), flash_id) && \
+	defined(QUADSPI_CR_FSEL)
 	uint8_t qspi_flash_id = DT_PROP(DT_NODELABEL(quadspi), flash_id);
 
 	HAL_QSPI_SetFlashID(&dev_data->hqspi,