Draft: Port three torch2flydsl MoE kernels to FlyDSL 0.2.2

[irvineoy]

Summary

Splits the three heavyweight implemented torch2flydsl MoE kernels out of #45 so that the main task-corpus PR is not blocked while their FlyDSL 0.2.2 port is completed:

• torch2flydsl/moe_a8w4_kernel
• torch2flydsl/moe_kernel
• torch2flydsl/moe_swiglu_kernel

This PR contains only the 12 task files for those three tasks.

Dependencies

• Depends on Add Torch and Triton kernels for Torch2FlyDSL and Triton2FlyDSL translation #45 for registration of the torch2flydsl task type and its prompt.
• Requires gfx950 / MI355X and lmsysorg/sglang-rocm:v0.5.14-rocm720-mi35x-20260705 (FlyDSL 0.2.2 and the matching AITER build).
• Depends on the Add Torch and Triton kernels for Torch2FlyDSL and Triton2FlyDSL translation #45 runner update that conditionally provides writable AITER/FlyDSL caches only for that v0.5.14 + gfx950 runtime.

Current status

Draft: do not merge yet.

The old v0.5.12 runtime fails first on missing FlyDSL APIs. With the intended FlyDSL 0.2.2 runtime, the kernels proceed further but still expose real porting issues, including wrapper/raw-value misuse around arith.shrui and a subsequent invalid arith.extsi i64 -> i32 lowering. These require task code changes rather than a validation-environment workaround.

Merge gate

For each of the three tasks on MI355X:

• configured compile command passes;
• every correctness shape passes;
• full benchmark completes;
• build/performance_report.json is valid and contains positive target-kernel latency.