Spi dma irq

Cargo.toml

@@ -23,6 +23,7 @@ test-hmac = []
 test-hash = []
 spi_dma = []
 spi_dma_write = []
+spi_dma_irq = []
 spi_monitor = []
 
 [dependencies]
@@ -33,6 +34,7 @@ embedded-io = "0.6.1"
 fugit = "0.3.7"
 proposed-traits = { git = "https://github.com/rusty1968/proposed_traits.git", package = "proposed-traits", rev = "85641310df5a5276c67f81621b104322cff0286c" }
 hex-literal = "0.4"
+heapless = "0.8.0"
 paste = "1.0"
 
 cortex-m = { version = "0.7.5" }

src/common.rs

@@ -1,5 +1,9 @@
 // Licensed under the Apache-2.0 license
 
+use crate::uart::UartController;
+use core::ops::{Index, IndexMut};
+use embedded_io::Write;
+
 pub struct DummyDelay;
 
 impl embedded_hal::delay::DelayNs for DummyDelay {
@@ -10,6 +14,15 @@ impl embedded_hal::delay::DelayNs for DummyDelay {
     }
 }
 
+pub fn fill_random(buf: &mut [u8], seed: &mut u32) {
+    for b in buf.iter_mut() {
+        *seed ^= *seed << 13;
+        *seed ^= *seed >> 17;
+        *seed ^= *seed << 5;
+        *b = (*seed & 0xFF) as u8;
+    }
+}
+
 #[repr(align(32))]
 pub struct DmaBuffer<const N: usize> {
     pub buf: [u8; N],
@@ -38,27 +51,25 @@ impl<const N: usize> DmaBuffer<N> {
     }
 
     #[must_use]
-    pub fn len(&self) -> usize {
+    pub const fn len(&self) -> usize {
         N
     }
 
     #[must_use]
-    pub fn is_empty(&self) -> bool {
+    pub const fn is_empty(&self) -> bool {
         N == 0
     }
 
     #[must_use]
-    pub fn as_slice(&self) -> &[u8] {
-        &self.buf
+    pub fn as_slice(&self, start: usize, end: usize) -> &[u8] {
+        &self.buf[start..end]
     }
 
     pub fn as_mut_slice(&mut self, start: usize, end: usize) -> &mut [u8] {
         &mut self.buf[start..end]
     }
 }
 
-use core::ops::{Index, IndexMut};
-
 impl<const N: usize> Index<usize> for DmaBuffer<N> {
     type Output = u8;
     fn index(&self, idx: usize) -> &Self::Output {
@@ -71,3 +82,37 @@ impl<const N: usize> IndexMut<usize> for DmaBuffer<N> {
         &mut self.buf[idx]
     }
 }
+
+pub trait Logger {
+    fn debug(&mut self, msg: &str);
+    fn error(&mut self, msg: &str);
+}
+
+// No-op implementation for production builds
+pub struct NoOpLogger;
+impl Logger for NoOpLogger {
+    fn debug(&mut self, _msg: &str) {}
+    fn error(&mut self, _msg: &str) {}
+}
+
+// UART logger adapter (separate concern)
+pub struct UartLogger<'a> {
+    uart: &'a mut UartController<'a>,
+}
+
+impl<'a> UartLogger<'a> {
+    pub fn new(uart: &'a mut UartController<'a>) -> Self {
+        UartLogger { uart }
+    }
+}
+
+impl<'a> Logger for UartLogger<'a> {
+    fn debug(&mut self, msg: &str) {
+        writeln!(self.uart, "{msg}").ok();
+        write!(self.uart, "\r").ok();
+    }
+    fn error(&mut self, msg: &str) {
+        writeln!(self.uart, "ERROR: {msg}").ok();
+        write!(self.uart, "\r").ok();
+    }
+}

src/main.rs

@@ -18,10 +18,10 @@ use aspeed_ddk::syscon::{ClockId, ResetId, SysCon};
 use fugit::MillisDurationU32 as MilliSeconds;
 
 use aspeed_ddk::tests::functional::ecdsa_test::run_ecdsa_tests;
-use aspeed_ddk::tests::functional::gpio_test;
 use aspeed_ddk::tests::functional::hash_test::run_hash_tests;
 use aspeed_ddk::tests::functional::hmac_test::run_hmac_tests;
 use aspeed_ddk::tests::functional::rsa_test::run_rsa_tests;
+use aspeed_ddk::tests::functional::{gpio_test, spim_test};
 use panic_halt as _;
 
 use proposed_traits::system_control::ResetControl;
@@ -142,6 +142,7 @@ fn main() -> ! {
     writeln!(uart_controller, "\r\nHello, world!!\r\n").unwrap();
 
     let delay = DummyDelay;
+
     let mut syscon = SysCon::new(delay.clone(), scu);
 
     // Enable HACE (Hash and Crypto Engine)
@@ -167,12 +168,28 @@ fn main() -> ! {
     test_wdt(&mut uart_controller);
 
     let test_spicontroller = false;
+    let test_irq = true;
     if test_spicontroller {
-        spi::spitest::test_fmc(&mut uart_controller);
-        spi::spitest::test_spi(&mut uart_controller);
-
+        if test_irq {
+            writeln!(uart_controller, "\r\nTEST SPI IRQ!!\r\n").unwrap();
+
+            spi::spidmairqtest::test_fmc_dma_irq(&mut uart_controller);
+            spi::spidmairqtest::test_spi_dma_irq(&mut uart_controller);
+        } else {
+            spi::spitest::test_fmc(&mut uart_controller);
+            spi::spitest::test_spi(&mut uart_controller);
+            //gpio_test::test_gpio_flash_power(&mut uart_controller);
+            // spi::spitest::test_spi2(&mut uart_controller);
+        }
+        let mut delay1 = DummyDelay;
+        delay1.delay_ns(10_000_000);
+    }
+    let spim_test = false;
+    if spim_test {
+        // use to release ast2600
+        spim_test::test_spim0(&mut uart_controller);
         gpio_test::test_gpio_flash_power(&mut uart_controller);
-        spi::spitest::test_spi2(&mut uart_controller);
+        gpio_test::test_gpio_bmc_reset(&mut uart_controller);
     }
     // Initialize the peripherals here if needed
     loop {

src/spi/device.rs

@@ -1,40 +1,45 @@
 // Licensed under the Apache-2.0 license
 
+use crate::spimonitor::SpiMonitorNum;
+
 use super::SpiBusWithCs;
 use super::SpiError;
-use crate::spimonitor::{SpiMonitor, SpipfInstance};
 use embedded_hal::spi::{ErrorType, Operation, SpiDevice};
 
 #[derive(Debug)]
-pub struct ChipSelectDevice<'a, B, SPIPF>
+pub struct ChipSelectDevice<'a, B>
 where
     B: SpiBusWithCs,
-    SPIPF: SpipfInstance,
 {
     pub bus: &'a mut B,
     pub cs: usize,
-    pub spi_monitor: Option<&'a mut SpiMonitor<SPIPF>>,
+    pub spim: Option<SpiMonitorNum>,
 }
 
-impl<'a, B, SPIPF> ErrorType for ChipSelectDevice<'a, B, SPIPF>
+impl<'a, B> ErrorType for ChipSelectDevice<'a, B>
 where
     B: SpiBusWithCs,
-    SPIPF: SpipfInstance,
 {
     type Error = B::Error;
 }
 
-impl<'a, B, SPIPF> SpiDevice for ChipSelectDevice<'a, B, SPIPF>
+impl From<SpiMonitorNum> for u32 {
+    #[inline]
+    fn from(v: SpiMonitorNum) -> u32 {
+        v as u32
+    }
+}
+
+impl<'a, B> SpiDevice for ChipSelectDevice<'a, B>
 where
     B: SpiBusWithCs,
-    SPIPF: SpipfInstance,
 {
     fn transaction(&mut self, operations: &mut [Operation<'_, u8>]) -> Result<(), SpiError> {
         self.bus.select_cs(self.cs)?;
-        if let Some(spim) = self.spi_monitor.as_mut() {
+        if let Some(spim) = self.spim {
             if self.bus.get_master_id() != 0 {
-                spim.spim_scu_ctrl_set(0x8, 0x8);
-                spim.spim_scu_ctrl_set(0x7, 1 + SPIPF::FILTER_ID as u32);
+                super::spim_scu_ctrl_set(0x8, 0x8);
+                super::spim_scu_ctrl_set(0x7, 1 + u32::from(spim));
             }
             super::spim_proprietary_pre_config();
         }
@@ -48,14 +53,12 @@ where
                 Operation::DelayNs(_) => todo!(),
             };
         }
-
-        super::spim_proprietary_post_config();
-        if let Some(spim) = self.spi_monitor.as_mut() {
+        if let Some(_spim) = self.spim {
+            super::spim_proprietary_post_config();
             if self.bus.get_master_id() != 0 {
-                spim.spim_scu_ctrl_clear(0xf);
+                super::spim_scu_ctrl_clear(0xf);
             }
         }
-        self.bus.deselect_cs(self.cs)?;
         Ok(())
     }