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LoongArch: Don't split the instructions containing relocs for extreme…
… code model. The ABI mandates the pcalau12i/addi.d/lu32i.d/lu52i.d instructions for addressing a symbol to be adjacent. So model them as "one large instruction", i.e. define_insn, with two output registers. The real address is the sum of these two registers. The advantage of this approach is the RTL passes can still use ldx/stx instructions to skip an addi.d instruction. gcc/ChangeLog: * config/loongarch/loongarch.md (unspec): Add UNSPEC_LA_PCREL_64_PART1 and UNSPEC_LA_PCREL_64_PART2. (la_pcrel64_two_parts): New define_insn. * config/loongarch/loongarch.cc (loongarch_tls_symbol): Fix a typo in the comment. (loongarch_call_tls_get_addr): If -mcmodel=extreme -mexplicit-relocs={always,auto}, use la_pcrel64_two_parts for addressing the TLS symbol and __tls_get_addr. Emit an REG_EQUAL note to allow CSE addressing __tls_get_addr. (loongarch_legitimize_tls_address): If -mcmodel=extreme -mexplicit-relocs={always,auto}, address TLS IE symbols with la_pcrel64_two_parts. (loongarch_split_symbol): If -mcmodel=extreme -mexplicit-relocs={always,auto}, address symbols with la_pcrel64_two_parts. (loongarch_output_mi_thunk): Clean up unreachable code. If -mcmodel=extreme -mexplicit-relocs={always,auto}, address the MI thunks with la_pcrel64_two_parts. gcc/testsuite/ChangeLog: * gcc.target/loongarch/func-call-extreme-1.c (dg-options): Use -O2 instead of -O0 to ensure the pcalau12i/addi/lu32i/lu52i instruction sequences are not reordered by the compiler. (NOIPA): Disallow interprocedural optimizations. * gcc.target/loongarch/func-call-extreme-2.c: Remove the content duplicated from func-call-extreme-1.c, include it instead. (dg-options): Likewise. * gcc.target/loongarch/func-call-extreme-3.c (dg-options): Likewise. * gcc.target/loongarch/func-call-extreme-4.c (dg-options): Likewise. * gcc.target/loongarch/cmodel-extreme-1.c: New test. * gcc.target/loongarch/cmodel-extreme-2.c: New test. * g++.target/loongarch/cmodel-extreme-mi-thunk-1.C: New test. * g++.target/loongarch/cmodel-extreme-mi-thunk-2.C: New test. * g++.target/loongarch/cmodel-extreme-mi-thunk-3.C: New test.
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11 changes: 11 additions & 0 deletions
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gcc/testsuite/g++.target/loongarch/cmodel-extreme-mi-thunk-1.C
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/* { dg-do compile } */ | ||
/* { dg-options "-O2 -fno-inline -march=loongarch64 -mabi=lp64d -O2 -mcmodel=extreme -fno-plt -mexplicit-relocs=always -mdirect-extern-access" } */ | ||
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struct A { | ||
virtual ~A(); | ||
}; | ||
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struct B : virtual A {}; | ||
void var() { B(); } | ||
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/* { dg-final { scan-assembler "pcalau12i\t\[^\n\]*%pc_hi20\\(\\.LTHUNK0\\)\n\taddi\\.d\t\[^\n\]*%pc_lo12\\(\\\.LTHUNK0\\)\n\tlu32i\\.d\t\[^\n\]*%pc64_lo20\\(\\.LTHUNK0\\)\n\tlu52i\\.d\t\[^\n\]*%pc64_hi12\\(\\.LTHUNK0\\)" } } */ |
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gcc/testsuite/g++.target/loongarch/cmodel-extreme-mi-thunk-2.C
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/* { dg-do compile } */ | ||
/* { dg-options "-O2 -fno-inline -march=loongarch64 -mabi=lp64d -O2 -mcmodel=extreme -fno-plt -mexplicit-relocs=auto -mdirect-extern-access" } */ | ||
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#include "cmodel-extreme-mi-thunk-1.C" | ||
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/* { dg-final { scan-assembler "pcalau12i\t\[^\n\]*%pc_hi20\\(\\.LTHUNK0\\)\n\taddi\\.d\t\[^\n\]*%pc_lo12\\(\\\.LTHUNK0\\)\n\tlu32i\\.d\t\[^\n\]*%pc64_lo20\\(\\.LTHUNK0\\)\n\tlu52i\\.d\t\[^\n\]*%pc64_hi12\\(\\.LTHUNK0\\)" } } */ |
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gcc/testsuite/g++.target/loongarch/cmodel-extreme-mi-thunk-3.C
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/* { dg-do compile } */ | ||
/* { dg-options "-O2 -fno-inline -march=loongarch64 -mabi=lp64d -O2 -mcmodel=extreme -fno-plt -mexplicit-relocs=none -mdirect-extern-access" } */ | ||
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#include "cmodel-extreme-mi-thunk-1.C" | ||
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/* { dg-final { scan-assembler "la.local\t\[^\n\]*\\.LTHUNK0" } } */ |
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/* { dg-do compile } */ | ||
/* { dg-options "-march=loongarch64 -mabi=lp64d -O2 -mcmodel=extreme -fno-plt -mexplicit-relocs=always -fdump-rtl-final" } */ | ||
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int a; | ||
extern int b; | ||
__thread int c __attribute__ ((tls_model ("local-exec"))); | ||
__thread int d __attribute__ ((tls_model ("initial-exec"))); | ||
__thread int e __attribute__ ((tls_model ("local-dynamic"))); | ||
__thread int f __attribute__ ((tls_model ("global-dynamic"))); | ||
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void | ||
test (void) | ||
{ | ||
a = b + c + d + e + f; | ||
} | ||
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/* a, b, d, e, f, and __tls_get_addr. */ | ||
/* { dg-final { scan-rtl-dump-times "la_pcrel64_two_parts" 6 "final" } } */ |
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/* { dg-do compile } */ | ||
/* { dg-options "-march=loongarch64 -mabi=lp64d -O2 -mcmodel=extreme -fno-plt -mexplicit-relocs=auto -fdump-rtl-final" } */ | ||
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#include "cmodel-extreme-1.c" | ||
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/* a, b, d, e, f, and __tls_get_addr. */ | ||
/* { dg-final { scan-rtl-dump-times "la_pcrel64_two_parts" 6 "final" } } */ |
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/* { dg-do compile } */ | ||
/* { dg-options "-mabi=lp64d -O0 -fpic -fno-plt -mexplicit-relocs -mcmodel=extreme" } */ | ||
/* { dg-options "-mabi=lp64d -O2 -fpic -fno-plt -mexplicit-relocs -mcmodel=extreme" } */ | ||
/* { dg-final { scan-assembler "test:.*pcalau12i.*%got_pc_hi20.*\n\taddi\.d.*%got_pc_lo12.*\n\tlu32i\.d.*%got64_pc_lo20.*\n\tlu52i\.d.*%got64_pc_hi12.*\n\tldx\.d" } } */ | ||
/* { dg-final { scan-assembler "test1:.*pcalau12i.*%got_pc_hi20.*\n\taddi\.d.*%got_pc_lo12.*\n\tlu32i\.d.*%got64_pc_lo20.*\n\tlu52i\.d.*%got64_pc_hi12.*\n\tldx\.d" } } */ | ||
/* { dg-final { scan-assembler "test2:.*pcalau12i.*%pc_hi20.*\n\taddi\.d.*%pc_lo12.*\n\tlu32i\.d.*%pc64_lo20.*\n\tlu52i\.d.*pc64_hi12.*\n\tadd\.d" } } */ | ||
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extern void g (void); | ||
void | ||
f (void) | ||
{} | ||
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static void | ||
l (void) | ||
{} | ||
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void | ||
test (void) | ||
{ | ||
g (); | ||
} | ||
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void | ||
test1 (void) | ||
{ | ||
f (); | ||
} | ||
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void | ||
test2 (void) | ||
{ | ||
l (); | ||
} | ||
#include "func-call-extreme-1.c" |
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