GitHub - GauthamMK-0/RISC-VxNVDLA: SoC architecture verification consisting NVDLA and RISC-V targeted for computer vision workloads

Name		Name	Last commit message	Last commit date
Latest commit History 20 Commits
CPU		CPU
DMA		DMA
IRQ		IRQ
Memory		Memory
NVDLA		NVDLA
bus		bus
common		common
top		top
.gitignore		.gitignore
Makefile		Makefile

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SoC architecture verification consisting NVDLA and RISC-V targeted for computer vision workloads

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