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feat(qemu): implement PTO v0.58 tile semantics and TSORT - #66

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feat(qemu): implement PTO v0.58 tile semantics and TSORT#66
jiale-wangOwO wants to merge 36 commits into
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jiale-wangOwO:feat/tsort-v058-contracts-20260821

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@jiale-wangOwO jiale-wangOwO commented Aug 21, 2026

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Summary

Implement PTO v0.58 tile semantics in Linx QEMU for the shared-tile,
CUBE/TEPL/TLSU, and low-precision numeric paths. This PR consolidates the
prior draft work from #60 and #65 (and the original #66 TSORT work) into a
single integrated branch, then rebases that work onto the current
origin/master (PTO ISA 0.58.3).

Rebase onto 0.58.3

  • Rebased feat/tsort-v058-contracts-20260821 with
    git rebase -X ours origin/master (commits already upstream dropped).
  • Manually reconciled the two changed helper paths in target/linx/helper.c:
    • linx_tile_preflight_tlsu: restore Core-level aggregate capacity
      (quarter, legacy_whole, shared_capacity) for Shared B.IOS.
    • linx_tile_shared_tmov_local_to_shared and
      linx_tile_shared_tmov_shared_to_local: retain the aggregate Core-level
      payload semantics (issue #112/#132) instead of the 0.58.3 per-PE layout.
  • hw/linx/virt.c keeps the 0.58.3 ISA identity
    (pto-isa-0.58.3-mode-function-v1).

Shared tile aggregate semantics

  • Interpret B.IOS.TSize with the Core-level aggregate table
    512 << (SizeCode-1) for v0.58 SizeCode=1..12; keep Local B.IOT
    capacity PE-local.
  • Fixed PE regions; Shared A/B handling for cooperative TMATMUL paths.
  • Apply shared aggregate capacity in tile descriptors, TSize derivation, and
    CUBE destination/profiles.

TEPL numeric (TDEQUANT / TQUANT / TREMS / TINSERT / TFMA)

  • TDEQUANT: read the integer source dtype from tile_dtype (B.DATR carries
    the FP32 destination type); accept S8/U8/S32 sources via a variable source
    array.
  • TQUANT: affine FP32 -> S8/U8 quantization with optional B.IOR scale and
    zero-point (omission selects multiplier 1.0 and zero point 0).
  • TREMS / remainder: FP16/BF16 remainder binary ops plus nonzero-divisor
    preflight for these dtypes.
  • TINSERT double-source fix; TFMA accepts FP16/BF16/FP32.
  • E8M0 and low-precision encode/decode helpers (type 6..14), including
    ReferenceFloatToE8M0 rounding modes.

TLSU (MGATHER / MSCATTER / MGATHER_CAS / GMOV / TLOAD)

  • MGATHER.CAS: per-lane atomic compare-and-swap at GM base plus
    signed/unsigned byte displacement; publishes the observed old value;
    supports S32/U32/S64/U64 index types.
  • MGATHER(_MASK) / MSCATTER(_MASK) byte-displacement semantics.
  • MSCATTER source-only TSize=000 capacity derivation; use the active
    valid extent for bounds checks.
  • GMOV and TLOAD Shared PE0 issuer profiles.

Contracts / docs

  • Tile-ISA contracts (decode, helper, tile_isa_058, preflight) and source
    binding via linx_tile_operation_source_count_accepted for variable-arity
    operations.
  • Refresh the QEMU tile profile matrix.

Validation

  • ninja -C build-linx qemu-system-linx64 (PASS)
  • python3 tests/linxisa/test_v058_pto_contract.py (23/23 PASS)
  • python3 tests/linxisa/test_v0583_contract.py (14/14 PASS)
  • build-linx/tests/unit/test-linx-tile-cube-numeric (PASS)
  • Full tests/linxisa/test_*.py suite (PASS)
  • git diff --check (clean)

Notes

CUBE profile matrix refresh

  • docs/linxisa/qemu_tile_profile_support.xlsx regenerated from the
    SuperScalarModel status after repartitioning the CUBE profiles by ASL
    numeric class (Float->F32, Signed->S32, Unsigned->U32, plus MX
    no-scale/with-scale). The previous AccType meta-rule is no longer a
    workbook column.

CUBE matrix refresh (2026-08-24)

  • Regenerated docs/linxisa/qemu_tile_profile_support.xlsx after the
    SuperScalarModel status promoted the ordinary TMATMUL Local Float and
    Unsigned class profiles on gfrun.
  • QEMU stays UNVERIFIED for those two classes (current QEMU CUBE cannot
    execute any v058 CUBE block); the existing Local Signed matrix pair -> S32
    and all MX class profiles keep their prior both-model PASS state.

@jiale-wangOwO jiale-wangOwO changed the title feat(qemu): implement PTO v0.58 TSORT per TSORT.asl feat(qemu): implement PTO v0.58 tile semantics and TSORT Aug 23, 2026
jiale-wangOwO and others added 25 commits August 23, 2026 22:55
Rewrite linx_tile_sort to match the authoritative TSORT.asl ordering and
publication model: sort_width from LB0 (0/omitted = 32, 1..64), stable
per-row-group 64-pass adjacent swaps, numeric-before-NaN ordering in both
directions, NaN source-order stability, signed-zero equality, and per-dtype
NaN classification (FP16 0x7c00/0x0200, BF16 0x7f80/0x0040, FP32
0x7f800000/0x00400000). The U32 index output is the original zero-based
column offset within its group (col MOD sort_width), and its physical rows
derive from its own 4-byte element size and TSize capacity. Signaling-NaN
observation ORs the sticky invalid status instead of faulting. Restrict the
TSORT dtype gate to FP32/FP16/BF16.
- TDEQUANT: read the integer source type from tile_dtype (B.DATR carries the
  FP32 destination type), accept S8/U8/S32 integer sources via a variable
  source array, and free TSize from the destination descriptor.
- TQUANT: implement affine FP32 -> S8/U8 quantization with optional B.IOR
  scale/zero-point (omission selects multiplier 1.0 and zero point 0).
- TREMS/remainder: support FP16/BF16 remainder binary operations and relax
  the nonzero-divisor preflight for those dtypes.
- Add E8M0 and low-precision numeric encode/decode to the f32<->dtype helpers
  (type 6..14), including ReferenceFloatToE8M0 rounding modes.
- MSCATTER / MSCATTER_MASK: accept source-only TSize=000 and derive
  capacity/size_code from the source descriptor; use the active valid extent
  for bounds checks.
- MGATHER.CAS: use the active valid extent for offset and expected/desired
  tile validation.
- Bind operation sources through linx_tile_operation_source_count_accepted
  so variable-arity operations are permitted.
- TINSERT double-source fix and TQUANT optional-IOR preflight.

Refs: LinxISA/SuperScalarModel#132
Restore the Core-level aggregate Shared B.IOS payload semantics from the
feat/tsort-v058-contracts branch on top of the PTO 0.58.3 master base.
This keeps the legacy whole-payload path (issue #112/#132) while wiring
the local/Shared TMOV preflight and commit paths to the new 0.58.3
registers and binding fields.

The 0.58.3 per-PE Shared layout is replaced by the aggregate form:
- local_to_shared writes the PE quarter into a Core-level payload.
- shared_to_local reads the PE quarter (or the whole payload) back out.

Validation:
- ninja -C build-linx qemu-system-linx64
- python3 tests/linxisa/test_v0583_contract.py
- python3 tests/linxisa/test_v058_pto_contract.py
The 0.58.3 master tests expected the per-PE Shared layout. On the branch
we keep the aggregate Core-level payload (issue #112/#132), so update the
contract assertions to require the legacy_whole path and the aggregate
memcpy forms instead of the per-element region loop.

Validation:
- python3 tests/linxisa/test_v0583_contract.py
- python3 tests/linxisa/test_v058_pto_contract.py
@jiale-wangOwO
jiale-wangOwO force-pushed the feat/tsort-v058-contracts-20260821 branch from 976e05b to b7e1fb5 Compare August 23, 2026 14:59
@jiale-wangOwO
jiale-wangOwO marked this pull request as ready for review August 23, 2026 15:00
Regenerate the QEMU tile profile workbook from the SuperScalarModel status
whose CUBE profiles are partitioned by ASL numeric class (Float->F32,
Signed->S32, Unsigned->U32, plus MX no-scale/with-scale).
Regenerate the QEMU CUBE profile matrix after the SuperScalarModel
cross-model status promoted the ordinary TMATMUL Local Float/Unsigned
class profiles on gfrun.  QEMU stays UNVERIFIED for those two classes
because the current QEMU CUBE path cannot execute any v058 CUBE block.
@jiale-wangOwO
jiale-wangOwO force-pushed the feat/tsort-v058-contracts-20260821 branch from 7b525e4 to 61c6f82 Compare August 24, 2026 08:27
@jiale-wangOwO

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Latest 0.58.4 update

Pushed commit 61c6f8213f to this PR branch.

Target spec:

pto-spec@23ca8833fef3f97dbc65beef4924b0b4671cdfdf

This update:

  • preserves B.IOS SizeCode bit15 in the internal packed Shared binder;
  • adds the unified Shared CUBE compute path for ordinary, BIAS, ACC, MX,
    MX+BIAS, and MX+ACC forms;
  • resolves Shared-A/Shared-B and local accumulator/scale/bias source layouts
    according to the latest contract.

Validation:

  • ninja -C build-linx qemu-system-linx64 — PASS
  • python3 -m unittest tests.linxisa.test_v058_pto_contract — 23/23 PASS

The four-PE carrier reaches Shared TLOAD and CUBE rendezvous but still times
out in its post-CUBE software barrier/finisher stage; that remains a separate
QEMU multi-PE TCG synchronization issue.

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