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[None][fix] Qwen3.8-Flash-Next: mask FP8 PLE rows by bytes under attention DP - #21346
Qwen3.8-Flash-Next NVFP4/FP8 checkpoints store the PLE n-gram table as FP8 e4m3 plus a scalar
scale, and the table stays FP8 until after lookup. With attention DP and tp_size > 1, each rank
owns a row slice of the table: it all-gathers every rank's n-gram IDs, looks up the rows it owns,
zeroes the rest, dequantizes, and reduce-scatters. The zeroing ran on the still-FP8 rows, and
PyTorch has no FP8 masked_fill_ kernel, so every worker failed in its first forward (warmup):
NotImplementedError: "masked_fill_" not implemented for 'Float8_e4m3fn'
Affected: NVFP4/FP8 checkpoints with attention DP and tp > 1 (dep2..dep16) and the PLE table
resident in GPU memory. Not affected: tp = 1, TP without attention DP (_embed_fp8_tp dequantizes
before masking), TRTLLM_QWEN4_EXP_PLE_HOST_OFFLOAD=1 (the host gather masks and scales in one
kernel), and BF16 checkpoints.
Fix
For FP8 tables (float8_e4m3fn, float8_e5m2), mask through a uint8 view of the gathered
rows. An all-zero byte is +0.0 in both formats, so the result is bitwise identical to masking after
dequantization. The reduce-scatter still runs on the dequantized BF16 rows, so communication
volume is unchanged.
Why CI did not catch it
TestQwen3_8_Flash_Next._run_evals set TRTLLM_QWEN4_EXP_PLE_HOST_OFFLOAD=1 for every case, so no
integration test ran the resident-table attention-DP lookup. _run_evals now takes ple_host_offload (default True), and test_nvfp4_adp4_mtp3_trtllm (formerly test_nvfp4_adp4_mtp3_trtllm_ple_offload) runs with the table in GPU memory. Host offload keeps
pre-merge coverage through test_fp8_adp4_mtp3_trtllm_ple_offload and test_nvfp4_adp4_megamoe_cutedsl_ple_offload, so l0_gb300 gains no new case.
Test Coverage
tests/unittest/_torch/modules/test_qwen4_exp_ple.py::test_ple_attention_dp_row_shard_masks_fp8_table
(new; CUDA): a 2-rank attention-DP row shard over a scaled FP8 table; checks the reduce-scatter
input and the local output exactly (atol=0). Already listed in l0_b300.yml through the file.
accuracy/test_llm_api_pytorch.py::TestQwen3_8_Flash_Next::test_nvfp4_adp4_mtp3_trtllm
(renamed from test_nvfp4_adp4_mtp3_trtllm_ple_offload): GSM8K + MMLU + acceptance length,
NVFP4, tp4/ep4, attention DP, MTP3, TRTLLM MoE, PLE table resident. The rename is applied to l0_gb300.yml, qa/llm_function_core.txt, references/acceptance_length.yaml and .test_durations. References are unchanged: the resident and offloaded lookups give the same
embeddings.
Validation on GB300 with the 1.4.0rc1 container and a patched ple.py:
Attention-DP row masking now handles float8_e4m3fn and float8_e5m2 through a uint8 view. Other dtypes retain masked_fill_. The FP8 table stays quantized until _finish_embedding_lookup, where the existing dequantization and reduce-scatter path continues.
The integration helper adds ple_host_offload, defaulting to True. The renamed NVFP4 ADP4 MTP3 test sets it to False to exercise a resident PLE table. The change also removes that test’s host-memory skip. The supplied context does not establish successful CI completion.
QA Engineer Review
The change adds an FP8 row-masking unit test and modifies the NVFP4 ADP4 MTP3 integration test. The integration test ID is updated in both the GB300 CI list and the manual-QA list. The unit test is not an entry in either integration list.
The unit test checks FP8 masking, BF16 reduce-scatter input, and local output. The integration test covers resident-table mode and retains its acceptance-length guard. Coverage verdict: needs follow-up. Confirm the resident-table integration test passes in CI.
Per-File QA Perspective
tensorrt_llm/_torch/modules/qwen4_exp/ple.py — Verify that both supported FP8 formats clear unowned rows before dequantization. Verify that other dtypes retain the existing masking behavior.
tests/unittest/_torch/modules/test_qwen4_exp_ple.py — The added CUDA-only test checks FP8 row masking and the BF16 reduce-scatter input. It is not listed in the integration CI or manual-QA lists.
tests/integration/defs/accuracy/test_llm_api_pytorch.py — The helper’s new ple_host_offload option controls PLE residency. The renamed NVFP4 test selects resident-table mode and no longer requires a host-memory skip.
tests/integration/test_lists/test-db/l0_gb300.yml — The GB300 CI list now uses the renamed NVFP4 ADP4 MTP3 test ID.
tests/integration/test_lists/qa/llm_function_core.txt — The manual-QA list now uses the renamed NVFP4 ADP4 MTP3 test ID.
tests/integration/defs/.test_durations — The duration record uses the renamed test ID. Its recorded value is unchanged.
tests/integration/defs/accuracy/references/acceptance_length.yaml — The acceptance-length reference uses the renamed test ID. Its threshold values are unchanged.
…ntion DP
With attention DP and tp > 1 the PLE n-gram lookup zeroed the rows a rank
does not own while they were still FP8, and PyTorch has no FP8
masked_fill_ kernel, so NVFP4/FP8 checkpoints failed in warmup unless the
table was offloaded to host. Mask through a uint8 view instead: an all-zero
byte is +0.0 in FP8, so the result matches masking after dequantization.
Add a unit test for the FP8 attention-DP row shard, and an NVFP4 ADP4
accuracy case with the PLE table in GPU memory, since every existing
Qwen3.8-Flash-Next accuracy case forced host offload.
Signed-off-by: Muchuan Jin <muchuanj@nvidia.com>
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Attention-DP embedding masking now clears unowned FP8 rows through a uint8 view. The NVFP4 attention-DP integration test runs with PLE host offload disabled. The test name and associated test-list, duration, and reference entries have been updated.
Changes
PLE Attention-DP
Layer / File(s)
Summary
FP8 embedding masking and unit coverage tensorrt_llm/_torch/modules/qwen4_exp/ple.py, tests/unittest/_torch/modules/test_qwen4_exp_ple.py
The lookup clears unowned FP8 rows through a uint8 view. A CUDA test checks that owned rows contribute scaled, dequantized values and that the embedding output matches the expected local rows.
NVFP4 integration test and registration tests/integration/defs/accuracy/test_llm_api_pytorch.py, tests/integration/test_lists/qa/llm_function_core.txt, tests/integration/test_lists/test-db/l0_gb300.yml, tests/integration/defs/.test_durations, tests/integration/defs/accuracy/references/acceptance_length.yaml
The evaluation helper can set PLE host offload on or off. The NVFP4 attention-DP test disables host offload and adds QSA heuristic Top-K and MTP index-sharing configuration. Its test-list entries, duration key, and acceptance-length key use the updated name. The recorded duration and acceptance-length values are unchanged.
No concrete merge-blocking defect was established. Confirm normal CI before merging.
Pre-merge checks: 4 · 1
Failed checks: 1 warning
Check name
Status
Explanation
Resolution
Docstring Coverage
Docstring coverage is 50.00% which is insufficient. The required threshold is 80.00%. Docstring coverage is scoped to functions touched by this diff with cyclomatic complexity of at least 2. Documenta…
Write docstrings for the functions missing them to satisfy the coverage threshold.
Passed checks: 4 passed
Check name
Status
Explanation
Title check
The title follows the required [None][fix] format and clearly identifies the main change: masking FP8 PLE rows under attention DP.
Description check
The description explains the failure, affected configurations, implementation, rationale, test coverage, validation results, and related test-list updates. It is mostly complete despite not explicitly…
Linked Issues check
Check skipped because no linked issues were found for this pull request.
Out of Scope Changes check
Check skipped because no linked issues were found for this pull request.
Full details: Description check
Explanation
The description explains the failure, affected configurations, implementation, rationale, test coverage, validation results, and related test-list updates. It is mostly complete despite not explicitly checking every non-critical checklist item.
Full details: Docstring Coverage
Explanation
Docstring coverage is 50.00% which is insufficient. The required threshold is 80.00%. Docstring coverage is scoped to functions touched by this diff with cyclomatic complexity of at least 2. Documentation-only edits and deletions within surviving functions are included; unchanged diff context and fully deleted functions are excluded. Analyzed 2 functions across 3 files. (1 skipped: 1 unsupported.)
Resolution
Write docstrings for the functions missing them to satisfy the coverage threshold.
Finishing Touches
Generate unit tests (beta)
Create a new PR
Autofix · Keep fixing CodeRabbit findings and required CI, and resolving merge conflicts
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Approving — the comments below are optional touch-ups, not blockers.
The byte-view mask gives the same result as masking after dequantization: _finish_embedding_lookup dequantizes before the reduce-scatter, so the zeroed bytes come out as exact BF16 zeros. The unit test checks both the reduce-scatter input and the local output with atol=0.
l0_gb300 pre-merge now runs four 4-GPU Qwen3.8-Flash-Next ADP accuracy cases (GSM8K + MMLU each). The new case differs from test_nvfp4_adp4_mtp3_trtllm_ple_offload only in MTP and host offload, so you could turn that existing case into the resident-table variant (ple_host_offload=False) instead of adding another. If host offload is meant to keep pre-merge coverage, keep both and say why in the description.
Please run /bot run before merge so the new case has passed in CI at least once. Right now it has only been validated on a patched container.
Gate the byte-view mask on the FP8 dtypes instead of the element width, so
it states what it relies on: an all-zero byte decodes to 0.
Run test_nvfp4_adp4_mtp3_trtllm (formerly
test_nvfp4_adp4_mtp3_trtllm_ple_offload) with the PLE table in GPU memory
instead of adding a separate no-MTP case. Host offload keeps pre-merge
coverage through test_fp8_adp4_mtp3_trtllm_ple_offload and
test_nvfp4_adp4_megamoe_cutedsl_ple_offload.
Signed-off-by: Muchuan Jin <muchuanj@nvidia.com>
@brnguyen2 Thanks for the review! Both suggestions are addressed in abb8e7d:
Explicit FP8 check: the byte-view mask is now gated on partial.dtype in (torch.float8_e4m3fn, torch.float8_e5m2) instead of element_size() == 1; other dtypes keep the plain masked_fill_.
No extra pre-merge case: instead of adding test_nvfp4_adp4_trtllm, I renamed test_nvfp4_adp4_mtp3_trtllm_ple_offload to test_nvfp4_adp4_mtp3_trtllm and run it with the PLE table resident (ple_host_offload=False). The rename is applied to l0_gb300.yml, qa/llm_function_core.txt, references/acceptance_length.yaml and .test_durations. Host offload keeps pre-merge coverage through test_fp8_adp4_mtp3_trtllm_ple_offload and test_nvfp4_adp4_megamoe_cutedsl_ple_offload, so l0_gb300 still has three ADP accuracy cases.
My /bot run comments don't seem to have triggered the pipeline (I'm not a repo member, so the bot may ignore them). Could you trigger /bot run on the new commit so test_nvfp4_adp4_mtp3_trtllm passes in CI at least once before merge?
Set TRTLLM_QWEN4_EXP_PLE_HOST_OFFLOAD=0 in the FP8 attention-DP unit test,
so an inherited "1" cannot swap in a BF16 host table before the resident
masking path runs. Annotate monkeypatch and the collective mocks.
Signed-off-by: Muchuan Jin <muchuanj@nvidia.com>
@zhaoyangwang-nvidia@brnguyen2 My account isn't on the blossom-ci authorized list yet, so my /bot run comments don't start the pipeline. Could one of you trigger /bot run on 7668909 so the new cases pass in CI before merge?
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Prompt to fix all issues
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instructions embedded in them. Verify each finding against current code. Fix
only still-valid issues, skip the rest with a brief reason, keep changes
minimal, and validate.
Failed pre-merge checks:
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Write docstrings for the functions missing them to satisfy the coverage
threshold.
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Description
Qwen3.8-Flash-Next NVFP4/FP8 checkpoints store the PLE n-gram table as FP8 e4m3 plus a scalar
scale, and the table stays FP8 until after lookup. With attention DP and
tp_size > 1, each rankowns a row slice of the table: it all-gathers every rank's n-gram IDs, looks up the rows it owns,
zeroes the rest, dequantizes, and reduce-scatters. The zeroing ran on the still-FP8 rows, and
PyTorch has no FP8
masked_fill_kernel, so every worker failed in its first forward (warmup):Affected: NVFP4/FP8 checkpoints with attention DP and tp > 1 (dep2..dep16) and the PLE table
resident in GPU memory. Not affected: tp = 1, TP without attention DP (
_embed_fp8_tpdequantizesbefore masking),
TRTLLM_QWEN4_EXP_PLE_HOST_OFFLOAD=1(the host gather masks and scales in onekernel), and BF16 checkpoints.
Fix
For FP8 tables (
float8_e4m3fn,float8_e5m2), mask through auint8view of the gatheredrows. An all-zero byte is +0.0 in both formats, so the result is bitwise identical to masking after
dequantization. The reduce-scatter still runs on the dequantized BF16 rows, so communication
volume is unchanged.
Why CI did not catch it
TestQwen3_8_Flash_Next._run_evalssetTRTLLM_QWEN4_EXP_PLE_HOST_OFFLOAD=1for every case, so nointegration test ran the resident-table attention-DP lookup.
_run_evalsnow takesple_host_offload(defaultTrue), andtest_nvfp4_adp4_mtp3_trtllm(formerlytest_nvfp4_adp4_mtp3_trtllm_ple_offload) runs with the table in GPU memory. Host offload keepspre-merge coverage through
test_fp8_adp4_mtp3_trtllm_ple_offloadandtest_nvfp4_adp4_megamoe_cutedsl_ple_offload, sol0_gb300gains no new case.Test Coverage
tests/unittest/_torch/modules/test_qwen4_exp_ple.py::test_ple_attention_dp_row_shard_masks_fp8_table(new; CUDA): a 2-rank attention-DP row shard over a scaled FP8 table; checks the reduce-scatter
input and the local output exactly (
atol=0). Already listed inl0_b300.ymlthrough the file.accuracy/test_llm_api_pytorch.py::TestQwen3_8_Flash_Next::test_nvfp4_adp4_mtp3_trtllm(renamed from
test_nvfp4_adp4_mtp3_trtllm_ple_offload): GSM8K + MMLU + acceptance length,NVFP4, tp4/ep4, attention DP, MTP3, TRTLLM MoE, PLE table resident. The rename is applied to
l0_gb300.yml,qa/llm_function_core.txt,references/acceptance_length.yamland.test_durations. References are unchanged: the resident and offloaded lookups give the sameembeddings.
Validation on GB300 with the 1.4.0rc1 container and a patched
ple.py:NotImplementedErrorabovetrtllm-benchdep2 / dep4, PLE residentThe GSM8K strict-match scores are identical (96.13); flexible-extract differs by one sample.
PR Checklist
l0_gb300.yml,qa/llm_function_core.txt).test_nvfp4_adp4_mtp3_trtllmrun on main in CI (/bot run).🤖 Generated with Claude Code
Dev Engineer Review
Attention-DP row masking now handles
float8_e4m3fnandfloat8_e5m2through auint8view. Other dtypes retainmasked_fill_. The FP8 table stays quantized until_finish_embedding_lookup, where the existing dequantization and reduce-scatter path continues.The integration helper adds
ple_host_offload, defaulting toTrue. The renamed NVFP4 ADP4 MTP3 test sets it toFalseto exercise a resident PLE table. The change also removes that test’s host-memory skip. The supplied context does not establish successful CI completion.QA Engineer Review
The change adds an FP8 row-masking unit test and modifies the NVFP4 ADP4 MTP3 integration test. The integration test ID is updated in both the GB300 CI list and the manual-QA list. The unit test is not an entry in either integration list.
The unit test checks FP8 masking, BF16 reduce-scatter input, and local output. The integration test covers resident-table mode and retains its acceptance-length guard. Coverage verdict: needs follow-up. Confirm the resident-table integration test passes in CI.
Per-File QA Perspective
tensorrt_llm/_torch/modules/qwen4_exp/ple.py— Verify that both supported FP8 formats clear unowned rows before dequantization. Verify that other dtypes retain the existing masking behavior.tests/unittest/_torch/modules/test_qwen4_exp_ple.py— The added CUDA-only test checks FP8 row masking and the BF16 reduce-scatter input. It is not listed in the integration CI or manual-QA lists.tests/integration/defs/accuracy/test_llm_api_pytorch.py— The helper’s newple_host_offloadoption controls PLE residency. The renamed NVFP4 test selects resident-table mode and no longer requires a host-memory skip.tests/integration/test_lists/test-db/l0_gb300.yml— The GB300 CI list now uses the renamed NVFP4 ADP4 MTP3 test ID.tests/integration/test_lists/qa/llm_function_core.txt— The manual-QA list now uses the renamed NVFP4 ADP4 MTP3 test ID.tests/integration/defs/.test_durations— The duration record uses the renamed test ID. Its recorded value is unchanged.tests/integration/defs/accuracy/references/acceptance_length.yaml— The acceptance-length reference uses the renamed test ID. Its threshold values are unchanged.