[Feature] add dtgen device tree compile-time code generator

.cargo/config.toml

@@ -3,6 +3,12 @@
 xtask = "--config xtasks/.cargo/config.toml run -p xtask --release --"
 
 [env]
+OSIRIS_TUNING_DTS = "nucleo_l4r5zi.dts"
+OSIRIS_TUNING_APPMEMSIZE = "8192"
+OSIRIS_TUNING_ENABLEFPU = "false"
+OSIRIS_DEBUG_RUNTIMESYMBOLS = "false"
+OSIRIS_TUNING_APPSTACKSIZE = "2048"
+OSIRIS_DEBUG_UART = "LPUART1"
 
 [build]
 target = "host-tuple"

Cargo.toml

@@ -42,6 +42,7 @@ syn = "2.0.100"
 quote = "1.0.40"
 rand = "0.8.5"
 cfg_aliases = "0.2.1"
+dtgen = { path = "xtasks/crates/dtgen" }
 
 [lints.rust]
 unexpected_cfgs = { level = "warn", check-cfg = ['cfg(kani)'] }

boards/nucleo_l4r5zi.dts

@@ -0,0 +1,235 @@
+/*
+ * Copyright (c) 2018 Pushpal Sidhu
+ *
+ * SPDX-License-Identifier: Apache-2.0 
+ *
+ * Modified for OsirisRTOS: removed Zephyr-specific nodes and macros,
+ * stripped arduino_r3_connector include.
+ */
+
+/dts-v1/;
+#include <st/l4/stm32l4r5Xi.dtsi>
+#include <st/l4/stm32l4r5z(g-i)tx-pinctrl.dtsi>
+#include <zephyr/dt-bindings/input/input-event-codes.h>
+
+/ {
+	model = "STMicroelectronics STM32L4R5ZI-NUCLEO board";
+	compatible = "st,stm32l4r5zi-nucleo";
+
+	chosen {
+        /delete-property/ zephyr,crc;
+        /delete-property/ zephyr,entropy;
+        /delete-property/ zephyr,flash-controller;
+
+		osiris,console = &lpuart1;
+		osiris,shell-uart = &lpuart1;
+		osiris,sram = &sram0;
+		osiris,flash = &flash0;
+        osiris,crc = &crc;
+        osiris,entropy = &rng;
+	};
+
+	leds: leds {
+		compatible = "gpio-leds";
+
+		green_led_0: led_0 {
+			gpios = <&gpioc 7 GPIO_ACTIVE_HIGH>;
+			label = "User LD1";
+		};
+
+		blue_led_0: led_1 {
+			gpios = <&gpiob 7 GPIO_ACTIVE_HIGH>;
+			label = "User LD2";
+		};
+
+		red_led_0: led_2 {
+			gpios = <&gpiob 14 GPIO_ACTIVE_HIGH>;
+			label = "User LD3";
+		};
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+
+		user_button: button {
+			label = "User";
+			gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
+			osiris,code = <INPUT_KEY_0>;
+		};
+	};
+
+	pwmleds: pwmleds {
+		compatible = "pwm-leds";
+		/* NOTE: disabled by default, PWM1 conflicts with SPI2 */
+		status = "disabled";
+
+		red_pwm_led: red_pwm_led {
+			pwms = <&pwm1 2 PWM_MSEC(20)
+				(PWM_POLARITY_NORMAL | STM32_PWM_COMPLEMENTARY)>;
+		};
+	};
+
+	aliases {
+		led0 = &green_led_0;
+		led1 = &blue_led_0;
+		led2 = &red_led_0;
+		sw0 = &user_button;
+		pwm-led0 = &red_pwm_led;
+		die-temp0 = &die_temp;
+		volt-sensor0 = &vref;
+		volt-sensor1 = &vbat;
+	};
+};
+
+&clk_lsi {
+	status = "okay";
+};
+
+&clk_hsi {
+	status = "okay";
+};
+
+&clk_hsi48 {
+	status = "okay";
+};
+
+&pll {
+	div-m = <4>;
+	mul-n = <40>;
+	div-p = <7>;
+	div-q = <2>;
+	div-r = <2>;
+	clocks = <&clk_hsi>;
+	status = "okay";
+};
+
+&rcc {
+	clocks = <&pll>;
+	clock-frequency = <DT_FREQ_M(80)>;
+	ahb-prescaler = <1>;
+	apb1-prescaler = <1>;
+	apb2-prescaler = <1>;
+};
+
+&usart1 {
+	pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
+	pinctrl-names = "default";
+	current-speed = <115200>;
+	status = "okay";
+};
+
+&usart2 {
+	pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
+	pinctrl-names = "default";
+	current-speed = <115200>;
+	status = "okay";
+};
+
+&usart3 {
+	pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>;
+	pinctrl-names = "default";
+	current-speed = <115200>;
+	status = "okay";
+};
+
+&lpuart1 {
+	pinctrl-0 = <&lpuart1_tx_pg7 &lpuart1_rx_pg8>;
+	pinctrl-names = "default";
+	current-speed = <115200>;
+	status = "okay";
+};
+
+&i2c1 {
+	pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb7>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&spi1 {
+	pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
+	pinctrl-names = "default";
+	cs-gpios = <&gpiod 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+	status = "okay";
+};
+
+&spi2 {
+	pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
+		     &spi2_miso_pb14 &spi2_mosi_pb15>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&spi3 {
+	/* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/
+	pinctrl-0 = <&spi3_nss_pa15 &spi3_sck_pc10
+		     &spi3_miso_pc11 &spi3_mosi_pc12>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+osiris_udc0: &usbotg_fs {
+	pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12
+		     &usb_otg_fs_id_pa10>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&timers1 {
+	status = "okay";
+
+	pwm1: pwm {
+		/* NOTE: disabled by default, PWM1 conflicts with SPI2 */
+		pinctrl-0 = <&tim1_ch2n_pb14>;
+		pinctrl-names = "default";
+	};
+};
+
+&timers2 {
+	status = "okay";
+
+	pwm2: pwm {
+		status = "okay";
+		pinctrl-0 = <&tim2_ch1_pa0>;
+		pinctrl-names = "default";
+	};
+};
+
+&rtc {
+	clocks = <&rcc STM32_CLOCK(APB1, 28)>,
+		 <&rcc STM32_SRC_LSI RTC_SEL(2)>;
+	status = "okay";
+};
+
+&flash0 {
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		/* Reserve last 16KiB for property storage */
+		storage_partition: partition@1fb000 {
+			label = "storage";
+			reg = <0x001fb000 DT_SIZE_K(16)>;
+		};
+	};
+};
+
+&adc1 {
+	pinctrl-0 = <&adc1_in1_pc0>;
+	pinctrl-names = "default";
+	st,adc-clock-source = "SYNC";
+	st,adc-prescaler = <4>;
+	status = "okay";
+};
+
+&die_temp {
+	status = "okay";
+};
+
+&vref {
+	status = "okay";
+};
+
+&vbat {
+	status = "okay";
+};

build.rs

@@ -1,4 +1,5 @@
-use std::{collections::HashMap, fs::File, path::Path};
+use std::process::Command;
+use std::{collections::HashMap, fs::File, path::Path, path::PathBuf};
 
 extern crate rand;
 extern crate syn;
@@ -19,6 +20,8 @@ fn main() {
     generate_syscall_map("src/syscalls").expect("Failed to generate syscall map.");
     generate_syscalls_export("src/syscalls").expect("Failed to generate syscall exports.");
 
+    generate_device_tree().expect("Failed to generate device tree.");
+
     // Get linker script from environment variable
     if let Ok(linker_script) = std::env::var("DEP_HAL_LINKER_SCRIPT") {
         println!("cargo::rustc-link-arg=-T{linker_script}");
@@ -31,6 +34,79 @@ fn main() {
     }
 }
 
+fn generate_device_tree() -> Result<(), Box<dyn std::error::Error>> {
+    let dts =
+        std::env::var("OSIRIS_TUNING_DTS").unwrap_or_else(|_| "nucleo_l4r5zi.dts".to_string());
+    println!("cargo::rerun-if-changed={dts}");
+
+    let dts_path = std::path::Path::new("boards").join(dts);
+
+    // dependencies SoC/HAL/pins
+    let zephyr = Path::new("/tmp/zephyr");
+    let hal_stm32 = Path::new("/tmp/hal_stm32");
+
+    // clean state
+    if zephyr.exists() {
+        std::fs::remove_dir_all(zephyr)?;
+    }
+
+    if hal_stm32.exists() {
+        std::fs::remove_dir_all(hal_stm32)?;
+    }
+
+    sparse_clone(
+        "https://github.com/zephyrproject-rtos/zephyr",
+        zephyr,
+        &["include", "dts"],
+    )?;
+    sparse_clone(
+        "https://github.com/zephyrproject-rtos/hal_stm32",
+        hal_stm32,
+        &["dts"],
+    )?;
+
+    let out = Path::new(&std::env::var("OUT_DIR").unwrap()).join("device_tree.rs");
+    let include_paths = [
+        zephyr.join("include"),
+        zephyr.join("dts/arm/st"),
+        zephyr.join("dts"),
+        zephyr.join("dts/arm"),
+        zephyr.join("dts/common"),
+        zephyr.join("boards/st"),
+        hal_stm32.join("dts"),
+    ];
+    let include_refs: Vec<&Path> = include_paths.iter().map(PathBuf::as_path).collect();
+
+    dtgen::run(&dts_path, &include_refs, &out)?;
+    Ok(())
+}
+
+fn sparse_clone(url: &str, dest: &Path, paths: &[&str]) -> Result<(), Box<dyn std::error::Error>> {
+    Command::new("git")
+        .args(["clone", "--filter=blob:none", "--no-checkout", url])
+        .arg(dest)
+        .status()?;
+
+    Command::new("git")
+        .args(["sparse-checkout", "init", "--cone"])
+        .current_dir(dest)
+        .status()?;
+
+    Command::new("git")
+        .arg("sparse-checkout")
+        .arg("set")
+        .args(paths)
+        .current_dir(dest)
+        .status()?;
+
+    Command::new("git")
+        .args(["checkout"])
+        .current_dir(dest)
+        .status()?;
+
+    Ok(())
+}
+
 fn generate_syscalls_export<P: AsRef<Path>>(root: P) -> Result<(), std::io::Error> {
     let syscalls = collect_syscalls_export(root);