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@maribu maribu commented Apr 13, 2025

Contribution description

Add a few cycles before starting the stopwatch for fancy CPUs that do have a cache and branch predictor that may warm up (e.g. Cortex M7).

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...

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Split out of #21403

Add a few cycles before starting the stopwatch for fancy CPUs that do
have a cache and branch predictor that may warm up (e.g. Cortex M7).
@maribu maribu marked this pull request as draft April 13, 2025 20:56
@github-actions github-actions bot added the Area: sys Area: System label Apr 13, 2025
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LGTM, any reason this is marked as draft?

@mguetschow mguetschow added the CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR label May 19, 2025
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maribu commented May 19, 2025

any reason this is marked as draft?

It currently has no users. I'm not sure if the impact of this PR is noticeable.

I should probably test on a Cortex M7. I recall that a Nucleo F767ZI is running a two instruction counting loop either in >10 CPU cycles or in 1 CPU cycle (due to the dual issue feature it can run up to two instructions simultaneously), depending on the branch predictor. I guess that will show if this PR has an impact on benchmarks that justifies the added complexity.

@crasbe crasbe added the Type: enhancement The issue suggests enhanceable parts / The PR enhances parts of the codebase / documentation label May 19, 2025
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riot-ci commented May 19, 2025

Murdock results

FAILED

15e8d0c sys/benchmark: warm up cache

Build failures (1)
Application Target Toolchain Runtime (s) Worker
tests/periph/fmc stm32f429i-disc1 gnu 1.45 mobi6

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4 participants