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[CI test - DO NOT MERGE] Demo Fixed bucket via Khronos #3741 cherry-pick #193

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6 changes: 3 additions & 3 deletions test/constant/local-float-point-constants.ll
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Expand Up @@ -49,6 +49,6 @@ define double @getConstantFP64() {
; CHECK: ReturnValue [[#FP64_CONST]]
; CHECK: FunctionEnd

; CHECK-LLVM: ret half 0xH3C4D
; CHECK-LLVM: ret float 0x3FD27C8BE0000000
; CHECK-LLVM: ret double 0x4F2DE42B8C68F3F1
; CHECK-LLVM: ret half 1.075200e+00
; CHECK-LLVM: ret float f0x3E93E45F
; CHECK-LLVM: ret double f0x4F2DE42B8C68F3F1
2 changes: 1 addition & 1 deletion test/extensions/EXT/SPV_EXT_float8/conversions_matrix.ll
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Expand Up @@ -27,7 +27,7 @@
; CHECK-SPIRV: FConvert [[#FP8MatrixTy]] [[#Conv:]] [[#M]]
; CHECK-SPIRV: Bitcast [[#Int8MatrixTy]] [[#]] [[#Conv]]

; CHECK-LLVM: %[[#M:]] = call spir_func target("spirv.CooperativeMatrixKHR", half, 3, 12, 12, 2) @_Z26__spirv_CompositeConstructDh(half 0xH0000)
; CHECK-LLVM: %[[#M:]] = call spir_func target("spirv.CooperativeMatrixKHR", half, 3, 12, 12, 2) @_Z26__spirv_CompositeConstructDh(half 0.000000e+00)
; CHECK-LLVM: call target("spirv.CooperativeMatrixKHR", i8, 3, 12, 12, 2) @_Z36__builtin_spirv_ConvertFP16ToE4M3EXTPU3AS144__spirv_CooperativeMatrixKHR__half_3_12_12_2(target("spirv.CooperativeMatrixKHR", half, 3, 12, 12, 2) %[[#M]])

; ModuleID = 'test.bc'
Expand Down
16 changes: 8 additions & 8 deletions test/extensions/EXT/SPV_EXT_float8/conversions_scalar_vector.ll
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Expand Up @@ -198,7 +198,7 @@ declare dso_local spir_func <8 x bfloat> @_Z36__builtin_spirv_ConvertE5M2ToBF16E
; CHECK-SPIRV: ReturnValue [[#Cast1]]

; CHECK-LLVM-LABEL: hf16_e4m3_scalar
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z36__builtin_spirv_ConvertFP16ToE4M3EXTDh(half 0xH3C00)
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z36__builtin_spirv_ConvertFP16ToE4M3EXTDh(half 1.000000e+00)
; CHECK-LLVM: ret i8 %[[#Call]]

define spir_func i8 @hf16_e4m3_scalar() {
Expand All @@ -215,7 +215,7 @@ declare dso_local spir_func i8 @_Z36__builtin_spirv_ConvertFP16ToE4M3EXTDh(half)
; CHECK-SPIRV: ReturnValue [[#Cast1]]

; CHECK-LLVM-LABEL: hf16_e4m3_vector
; CHECK-LLVM: %[[#Call:]] = call <8 x i8> @_Z36__builtin_spirv_ConvertFP16ToE4M3EXTDv8_Dh(<8 x half> splat (half 0xH3C00))
; CHECK-LLVM: %[[#Call:]] = call <8 x i8> @_Z36__builtin_spirv_ConvertFP16ToE4M3EXTDv8_Dh(<8 x half> splat (half 1.000000e+00))
; CHECK-LLVM: ret <8 x i8> %[[#Call]]

define spir_func <8 x i8> @hf16_e4m3_vector() {
Expand All @@ -232,7 +232,7 @@ declare dso_local spir_func <8 x i8> @_Z36__builtin_spirv_ConvertFP16ToE4M3EXTDv
; CHECK-SPIRV: ReturnValue [[#Cast1]]

; CHECK-LLVM-LABEL: hf16_e5m2_scalar
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z36__builtin_spirv_ConvertFP16ToE5M2EXTDh(half 0xH3C00)
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z36__builtin_spirv_ConvertFP16ToE5M2EXTDh(half 1.000000e+00)
; CHECK-LLVM: ret i8 %[[#Call]]

define spir_func i8 @hf16_e5m2_scalar() {
Expand All @@ -249,7 +249,7 @@ declare dso_local spir_func i8 @_Z36__builtin_spirv_ConvertFP16ToE5M2EXTDh(half)
; CHECK-SPIRV: ReturnValue [[#Cast1]]

; CHECK-LLVM-LABEL: hf16_e5m2_vector
; CHECK-LLVM: %[[#Call:]] = call <8 x i8> @_Z36__builtin_spirv_ConvertFP16ToE5M2EXTDv8_Dh(<8 x half> splat (half 0xH3C00))
; CHECK-LLVM: %[[#Call:]] = call <8 x i8> @_Z36__builtin_spirv_ConvertFP16ToE5M2EXTDv8_Dh(<8 x half> splat (half 1.000000e+00))
; CHECK-LLVM: ret <8 x i8> %[[#Call]]

define spir_func <8 x i8> @hf16_e5m2_vector() {
Expand All @@ -266,7 +266,7 @@ declare dso_local spir_func <8 x i8> @_Z36__builtin_spirv_ConvertFP16ToE5M2EXTDv
; CHECK-SPIRV: ReturnValue [[#Cast1]]

; CHECK-LLVM-LABEL: bf16_e4m3_scalar
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z36__builtin_spirv_ConvertBF16ToE4M3EXTDF16b(bfloat 0xR3F80)
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z36__builtin_spirv_ConvertBF16ToE4M3EXTDF16b(bfloat 1.000000e+00)
; CHECK-LLVM: ret i8 %[[#Call]]

define spir_func i8 @bf16_e4m3_scalar() {
Expand All @@ -283,7 +283,7 @@ declare dso_local spir_func i8 @_Z36__builtin_spirv_ConvertBF16ToE4M3EXTDF16b(bf
; CHECK-SPIRV: ReturnValue [[#Cast1]]

; CHECK-LLVM-LABEL: bf16_e4m3_vector
; CHECK-LLVM: %[[#Call:]] = call <8 x i8> @_Z36__builtin_spirv_ConvertBF16ToE4M3EXTDv8_DF16b(<8 x bfloat> splat (bfloat 0xR3F80))
; CHECK-LLVM: %[[#Call:]] = call <8 x i8> @_Z36__builtin_spirv_ConvertBF16ToE4M3EXTDv8_DF16b(<8 x bfloat> splat (bfloat 1.000000e+00))
; CHECK-LLVM: ret <8 x i8> %[[#Call]]

define spir_func <8 x i8> @bf16_e4m3_vector() {
Expand All @@ -300,7 +300,7 @@ declare dso_local spir_func <8 x i8> @_Z36__builtin_spirv_ConvertBF16ToE4M3EXTDv
; CHECK-SPIRV: ReturnValue [[#Cast1]]

; CHECK-LLVM-LABEL: bf16_e5m2_scalar
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z36__builtin_spirv_ConvertBF16ToE5M2EXTDF16b(bfloat 0xR3F80)
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z36__builtin_spirv_ConvertBF16ToE5M2EXTDF16b(bfloat 1.000000e+00)
; CHECK-LLVM: ret i8 %[[#Call]]

define spir_func i8 @bf16_e5m2_scalar() {
Expand All @@ -317,7 +317,7 @@ declare dso_local spir_func i8 @_Z36__builtin_spirv_ConvertBF16ToE5M2EXTDF16b(bf
; CHECK-SPIRV: ReturnValue [[#Cast1]]

; CHECK-LLVM-LABEL: bf16_e5m2_vector
; CHECK-LLVM: %[[#Call:]] = call <8 x i8> @_Z36__builtin_spirv_ConvertBF16ToE5M2EXTDv8_DF16b(<8 x bfloat> splat (bfloat 0xR3F80))
; CHECK-LLVM: %[[#Call:]] = call <8 x i8> @_Z36__builtin_spirv_ConvertBF16ToE5M2EXTDv8_DF16b(<8 x bfloat> splat (bfloat 1.000000e+00))
; CHECK-LLVM: ret <8 x i8> %[[#Call]]

define spir_func <8 x i8> @bf16_e5m2_vector() {
Expand Down
2 changes: 1 addition & 1 deletion test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fsub_half.ll
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Expand Up @@ -27,7 +27,7 @@ entry:
%0 = atomicrmw fsub ptr addrspace(1) @f, half 1.0e+00 seq_cst
; CHECK-SPIRV: FNegate [[Half]] [[NegateValue:[0-9]+]] [[HalfValue]]
; CHECK-SPIRV: AtomicFAddEXT [[Half]] {{[0-9]+}} [[HalfPointer]] [[ScopeCrossDevice]] [[MemSem_SequentiallyConsistent]] [[NegateValue]]
; CHECK-LLVM: [[FNegateLLVM:%[0-9]+]] = fneg half 0xH3C00
; CHECK-LLVM: [[FNegateLLVM:%[0-9]+]] = fneg half 1.000000e+00
; CHECK-LLVM: call spir_func half {{.*}}atomic_add{{.*}}(ptr addrspace(1) @f, half [[FNegateLLVM]])
ret void
}
Expand Down
10 changes: 5 additions & 5 deletions test/extensions/INTEL/SPV_INTEL_float4/conversions_packed.ll
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Expand Up @@ -106,7 +106,7 @@ declare dso_local spir_func <8 x i8> @_Z38__builtin_spirv_ConvertE2M1ToE4M3INTEL
; CHECK-SPIRV: ReturnValue [[#Cast2]]

; CHECK-LLVM-LABEL: hf16_fp4e2m1_32
; CHECK-LLVM: %[[#Call:]] = call <8 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv8_Dh(<8 x half> splat (half 0xH3C00))
; CHECK-LLVM: %[[#Call:]] = call <8 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv8_Dh(<8 x half> splat (half 1.000000e+00))
; CHECK-LLVM: %[[#Cast:]] = bitcast <8 x i4> %[[#Call]] to i32
; CHECK-LLVM: ret i32 %[[#Cast]]

Expand Down Expand Up @@ -145,7 +145,7 @@ declare dso_local spir_func <2 x i8> @_Z38__builtin_spirv_ConvertE2M1ToE4M3INTEL
; CHECK-SPIRV: ReturnValue [[#Cast2]]

; CHECK-LLVM-LABEL: hf16_fp4e2m1_8
; CHECK-LLVM: %[[#Call:]] = call <2 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv2_Dh(<2 x half> splat (half 0xH3C00))
; CHECK-LLVM: %[[#Call:]] = call <2 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv2_Dh(<2 x half> splat (half 1.000000e+00))
; CHECK-LLVM: %[[#Cast:]] = bitcast <2 x i4> %[[#Call]] to i8
; CHECK-LLVM: ret i8 %[[#Cast]]

Expand Down Expand Up @@ -228,7 +228,7 @@ declare dso_local spir_func <4 x i8> @_Z38__builtin_spirv_ConvertE2M1ToE4M3INTEL
; CHECK-SPIRV: ReturnValue [[#Cast2]]

; CHECK-LLVM-LABEL: hf16_fp4e2m1_16
; CHECK-LLVM: %[[#Call:]] = call <4 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv4_Dh(<4 x half> splat (half 0xH3C00))
; CHECK-LLVM: %[[#Call:]] = call <4 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv4_Dh(<4 x half> splat (half 1.000000e+00))
; CHECK-LLVM: %[[#Cast:]] = bitcast <4 x i4> %[[#Call]] to i16
; CHECK-LLVM: ret i16 %[[#Cast]]

Expand All @@ -248,7 +248,7 @@ declare dso_local spir_func i16 @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv4_D
; CHECK-SPIRV: ReturnValue [[#Cast2]]

; CHECK-LLVM-LABEL: hf16_fp4e2m1_64
; CHECK-LLVM: %[[#Call:]] = call <16 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv16_Dh(<16 x half> splat (half 0xH3C00))
; CHECK-LLVM: %[[#Call:]] = call <16 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv16_Dh(<16 x half> splat (half 1.000000e+00))
; CHECK-LLVM: %[[#Cast:]] = bitcast <16 x i4> %[[#Call]] to i64
; CHECK-LLVM: ret i64 %[[#Cast]]

Expand All @@ -268,7 +268,7 @@ declare dso_local spir_func i64 @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv16_
; CHECK-SPIRV: ReturnValue [[#Cast]]

; CHECK-LLVM-LABEL: hf16_fp4e2m1_vec2xi8
; CHECK-LLVM: %[[#Call:]] = call <4 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv4_Dh(<4 x half> splat (half 0xH3C00))
; CHECK-LLVM: %[[#Call:]] = call <4 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv4_Dh(<4 x half> splat (half 1.000000e+00))
; CHECK-LLVM: %[[#Cast:]] = bitcast <4 x i4> %[[#Call]] to <2 x i8>
; CHECK-LLVM: ret <2 x i8> %[[#Cast]]

Expand Down
8 changes: 4 additions & 4 deletions test/extensions/INTEL/SPV_INTEL_float4/conversions_scalar_vector.ll
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Expand Up @@ -211,7 +211,7 @@ declare dso_local spir_func <8 x bfloat> @_Z38__builtin_spirv_ConvertE2M1ToBF16I
; CHECK-SPIRV: ReturnValue [[#Cast]]

; CHECK-LLVM-LABEL: hf16_fp4e2m1_scalar
; CHECK-LLVM: %[[#Call:]] = call i4 @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDh(half 0xH3C00)
; CHECK-LLVM: %[[#Call:]] = call i4 @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDh(half 1.000000e+00)
; CHECK-LLVM: ret i4 %[[#Call]]

define spir_func i4 @hf16_fp4e2m1_scalar() {
Expand All @@ -228,7 +228,7 @@ declare dso_local spir_func i4 @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDh(hal
; CHECK-SPIRV: ReturnValue [[#Cast]]

; CHECK-LLVM-LABEL: hf16_fp4e2m1_vector
; CHECK-LLVM: %[[#Call:]] = call <8 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv8_Dh(<8 x half> splat (half 0xH3C00))
; CHECK-LLVM: %[[#Call:]] = call <8 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTELDv8_Dh(<8 x half> splat (half 1.000000e+00))
; CHECK-LLVM: ret <8 x i4> %[[#Call]]

define spir_func <8 x i4> @hf16_fp4e2m1_vector() {
Expand All @@ -245,7 +245,7 @@ declare dso_local spir_func <8 x i4> @_Z38__builtin_spirv_ConvertFP16ToE2M1INTEL
; CHECK-SPIRV: ReturnValue [[#Cast]]

; CHECK-LLVM-LABEL: bf16_fp4e2m1_scalar
; CHECK-LLVM: %[[#Call:]] = call i4 @_Z38__builtin_spirv_ConvertBF16ToE2M1INTELDF16b(bfloat 0xR3F80)
; CHECK-LLVM: %[[#Call:]] = call i4 @_Z38__builtin_spirv_ConvertBF16ToE2M1INTELDF16b(bfloat 1.000000e+00)
; CHECK-LLVM: ret i4 %[[#Call]]

define spir_func i4 @bf16_fp4e2m1_scalar() {
Expand All @@ -262,7 +262,7 @@ declare dso_local spir_func i4 @_Z38__builtin_spirv_ConvertBF16ToE2M1INTELDF16b(
; CHECK-SPIRV: ReturnValue [[#Cast]]

; CHECK-LLVM-LABEL: bf16_fp4e2m1_vector
; CHECK-LLVM: %[[#Call:]] = call <8 x i4> @_Z38__builtin_spirv_ConvertBF16ToE2M1INTELDv8_DF16b(<8 x bfloat> splat (bfloat 0xR3F80))
; CHECK-LLVM: %[[#Call:]] = call <8 x i4> @_Z38__builtin_spirv_ConvertBF16ToE2M1INTELDv8_DF16b(<8 x bfloat> splat (bfloat 1.000000e+00))
; CHECK-LLVM: ret <8 x i4> %[[#Call]]

define spir_func <8 x i4> @bf16_fp4e2m1_vector() {
Expand Down
34 changes: 17 additions & 17 deletions test/extensions/INTEL/SPV_INTEL_fp_conversions/spv_intel_fp_conversions.ll
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Expand Up @@ -66,7 +66,7 @@ target triple = "spir-unknown-unknown"
; CHECK-SPIRV: ReturnValue [[#Cast]]

; CHECK-LLVM-LABEL: hf16_hf8_clamp
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z43__builtin_spirv_ClampConvertFP16ToE4M3INTELDh(half 0xH3C00)
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z43__builtin_spirv_ClampConvertFP16ToE4M3INTELDh(half 1.000000e+00)
; CHECK-LLVM: ret i8 %[[#Call]]

define spir_func i8 @hf16_hf8_clamp() {
Expand All @@ -83,7 +83,7 @@ declare dso_local spir_func i8 @_Z43__builtin_spirv_ClampConvertFP16ToE4M3INTELD
; CHECK-SPIRV: ReturnValue [[#Cast]]

; CHECK-LLVM-LABEL: hf16_bf8_clamp
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z43__builtin_spirv_ClampConvertFP16ToE5M2INTELDh(half 0xH3C00)
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z43__builtin_spirv_ClampConvertFP16ToE5M2INTELDh(half 1.000000e+00)
; CHECK-LLVM: ret i8 %[[#Call]]

define spir_func i8 @hf16_bf8_clamp() {
Expand All @@ -100,7 +100,7 @@ declare dso_local spir_func i8 @_Z43__builtin_spirv_ClampConvertFP16ToE5M2INTELD
; CHECK-SPIRV: ReturnValue [[#Cast]]

; CHECK-LLVM-LABEL: bf16_hf8_clamp
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z43__builtin_spirv_ClampConvertBF16ToE4M3INTELDF16b(bfloat 0xR3F80)
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z43__builtin_spirv_ClampConvertBF16ToE4M3INTELDF16b(bfloat 1.000000e+00)
; CHECK-LLVM: ret i8 %[[#Call]]

define spir_func i8 @bf16_hf8_clamp() {
Expand All @@ -117,7 +117,7 @@ declare dso_local spir_func i8 @_Z43__builtin_spirv_ClampConvertBF16ToE4M3INTELD
; CHECK-SPIRV: ReturnValue [[#Cast]]

; CHECK-LLVM-LABEL: bf16_bf8_clamp
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z43__builtin_spirv_ClampConvertBF16ToE5M2INTELDF16b(bfloat 0xR3F80)
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z43__builtin_spirv_ClampConvertBF16ToE5M2INTELDF16b(bfloat 1.000000e+00)
; CHECK-LLVM: ret i8 %[[#Call]]

define spir_func i8 @bf16_bf8_clamp() {
Expand All @@ -134,7 +134,7 @@ declare dso_local spir_func i8 @_Z43__builtin_spirv_ClampConvertBF16ToE5M2INTELD
; CHECK-SPIRV: ReturnValue [[#Cast]]

; CHECK-LLVM-LABEL: hf16_bf8_stochastic
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z46__builtin_spirv_StochasticRoundFP16ToE5M2INTELDhi(half 0xH3C00, i32 1)
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z46__builtin_spirv_StochasticRoundFP16ToE5M2INTELDhi(half 1.000000e+00, i32 1)
; CHECK-LLVM: ret i8 %[[#Call]]

define spir_func i8 @hf16_bf8_stochastic() {
Expand All @@ -151,7 +151,7 @@ declare dso_local spir_func i8 @_Z46__builtin_spirv_StochasticRoundFP16ToE5M2INT
; CHECK-SPIRV: ReturnValue [[#Cast]]

; CHECK-LLVM-LABEL: hf16_hf8_stochastic
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z46__builtin_spirv_StochasticRoundFP16ToE4M3INTELDhi(half 0xH3C00, i32 1)
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z46__builtin_spirv_StochasticRoundFP16ToE4M3INTELDhi(half 1.000000e+00, i32 1)
; CHECK-LLVM: ret i8 %[[#Call]]

define spir_func i8 @hf16_hf8_stochastic() {
Expand All @@ -168,7 +168,7 @@ declare dso_local spir_func i8 @_Z46__builtin_spirv_StochasticRoundFP16ToE4M3INT
; CHECK-SPIRV: ReturnValue [[#Cast]]

; CHECK-LLVM-LABEL: bf16_bf8_stochastic
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z46__builtin_spirv_StochasticRoundBF16ToE5M2INTELDF16bi(bfloat 0xR3F80, i32 1)
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z46__builtin_spirv_StochasticRoundBF16ToE5M2INTELDF16bi(bfloat 1.000000e+00, i32 1)
; CHECK-LLVM: ret i8 %[[#Call]]

define spir_func i8 @bf16_bf8_stochastic() {
Expand All @@ -185,7 +185,7 @@ declare dso_local spir_func i8 @_Z46__builtin_spirv_StochasticRoundBF16ToE5M2INT
; CHECK-SPIRV: ReturnValue [[#Cast]]

; CHECK-LLVM-LABEL: bf16_hf8_stochastic
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z46__builtin_spirv_StochasticRoundBF16ToE4M3INTELDF16bi(bfloat 0xR3F80, i32 1)
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z46__builtin_spirv_StochasticRoundBF16ToE4M3INTELDF16bi(bfloat 1.000000e+00, i32 1)
; CHECK-LLVM: ret i8 %[[#Call]]

define spir_func i8 @bf16_hf8_stochastic() {
Expand All @@ -202,7 +202,7 @@ declare dso_local spir_func i8 @_Z46__builtin_spirv_StochasticRoundBF16ToE4M3INT
; CHECK-SPIRV: ReturnValue [[#Cast]]

; CHECK-LLVM-LABEL: hf16_fp4e2m1_stochastic
; CHECK-LLVM: %[[#Call:]] = call i4 @_Z46__builtin_spirv_StochasticRoundFP16ToE2M1INTELDhi(half 0xH3C00, i32 1)
; CHECK-LLVM: %[[#Call:]] = call i4 @_Z46__builtin_spirv_StochasticRoundFP16ToE2M1INTELDhi(half 1.000000e+00, i32 1)
; CHECK-LLVM: ret i4 %[[#Call]]

define spir_func i4 @hf16_fp4e2m1_stochastic() {
Expand All @@ -219,7 +219,7 @@ declare dso_local spir_func i4 @_Z46__builtin_spirv_StochasticRoundFP16ToE2M1INT
; CHECK-SPIRV: ReturnValue [[#Cast]]

; CHECK-LLVM-LABEL: bf16_fp4e2m1_stochastic
; CHECK-LLVM: %[[#Call:]] = call i4 @_Z46__builtin_spirv_StochasticRoundBF16ToE2M1INTELDF16bi(bfloat 0xR3F80, i32 1)
; CHECK-LLVM: %[[#Call:]] = call i4 @_Z46__builtin_spirv_StochasticRoundBF16ToE2M1INTELDF16bi(bfloat 1.000000e+00, i32 1)
; CHECK-LLVM: ret i4 %[[#Call]]

define spir_func i4 @bf16_fp4e2m1_stochastic() {
Expand All @@ -235,7 +235,7 @@ declare dso_local spir_func i4 @_Z46__builtin_spirv_StochasticRoundBF16ToE2M1INT
; CHECK-SPIRV: ReturnValue [[#Conv]]

; CHECK-LLVM-LABEL: hf16_int4_stochastic
; CHECK-LLVM: %[[#Call:]] = call i4 @_Z51__builtin_spirv_ClampStochasticRoundFP16ToInt4INTELDhi(half 0xH3C00, i32 1)
; CHECK-LLVM: %[[#Call:]] = call i4 @_Z51__builtin_spirv_ClampStochasticRoundFP16ToInt4INTELDhi(half 1.000000e+00, i32 1)
; CHECK-LLVM: ret i4 %[[#Call]]

define spir_func i4 @hf16_int4_stochastic() {
Expand All @@ -251,7 +251,7 @@ declare dso_local spir_func i4 @_Z51__builtin_spirv_ClampStochasticRoundFP16ToIn
; CHECK-SPIRV: ReturnValue [[#Conv]]

; CHECK-LLVM-LABEL: bf16_int4_stochastic
; CHECK-LLVM: %[[#Call:]] = call i4 @_Z51__builtin_spirv_ClampStochasticRoundBF16ToInt4INTELDF16bi(bfloat 0xR3F80, i32 1)
; CHECK-LLVM: %[[#Call:]] = call i4 @_Z51__builtin_spirv_ClampStochasticRoundBF16ToInt4INTELDF16bi(bfloat 1.000000e+00, i32 1)
; CHECK-LLVM: ret i4 %[[#Call]]

define spir_func i4 @bf16_int4_stochastic() {
Expand All @@ -268,7 +268,7 @@ declare dso_local spir_func i4 @_Z51__builtin_spirv_ClampStochasticRoundBF16ToIn
; CHECK-SPIRV: ReturnValue [[#Cast]]

; CHECK-LLVM-LABEL: hf16_bf8_clamp_stochastic
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z51__builtin_spirv_ClampStochasticRoundFP16ToE5M2INTELDhi(half 0xH3C00, i32 1)
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z51__builtin_spirv_ClampStochasticRoundFP16ToE5M2INTELDhi(half 1.000000e+00, i32 1)
; CHECK-LLVM: ret i8 %[[#Call]]

define spir_func i8 @hf16_bf8_clamp_stochastic() {
Expand All @@ -285,7 +285,7 @@ declare dso_local spir_func i8 @_Z51__builtin_spirv_ClampStochasticRoundFP16ToE5
; CHECK-SPIRV: ReturnValue [[#Cast]]

; CHECK-LLVM-LABEL: bf16_bf8_clamp_stochastic
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z51__builtin_spirv_ClampStochasticRoundBF16ToE5M2INTELDF16bi(bfloat 0xR3F80, i32 1)
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z51__builtin_spirv_ClampStochasticRoundBF16ToE5M2INTELDF16bi(bfloat 1.000000e+00, i32 1)
; CHECK-LLVM: ret i8 %[[#Call]]

define spir_func i8 @bf16_bf8_clamp_stochastic() {
Expand All @@ -304,7 +304,7 @@ declare dso_local spir_func i8 @_Z51__builtin_spirv_ClampStochasticRoundBF16ToE5

; CHECK-LLVM-LABEL: hf16_bf8_stochastic_last_seed
; CHECK-LLVM: %[[#Ptr:]] = alloca i32
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z46__builtin_spirv_StochasticRoundFP16ToE5M2INTELDhiPi(half 0xH3C00, i32 1, ptr %[[#Ptr]])
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z46__builtin_spirv_StochasticRoundFP16ToE5M2INTELDhiPi(half 1.000000e+00, i32 1, ptr %[[#Ptr]])
; CHECK-LLVM: ret i8 %[[#Call]]

define spir_func i8 @hf16_bf8_stochastic_last_seed() {
Expand All @@ -323,7 +323,7 @@ declare dso_local spir_func i8 @_Z46__builtin_spirv_StochasticRoundFP16ToE5M2INT

; CHECK-LLVM-LABEL: hf16_int4_stochastic_last_seed
; CHECK-LLVM: %[[#Ptr:]] = alloca i32
; CHECK-LLVM: %[[#Call:]] = call i4 @_Z51__builtin_spirv_ClampStochasticRoundFP16ToInt4INTELDhiPi(half 0xH3C00, i32 1, ptr %[[#Ptr]])
; CHECK-LLVM: %[[#Call:]] = call i4 @_Z51__builtin_spirv_ClampStochasticRoundFP16ToInt4INTELDhiPi(half 1.000000e+00, i32 1, ptr %[[#Ptr]])
; CHECK-LLVM: ret i4 %[[#Call]]

define spir_func i4 @hf16_int4_stochastic_last_seed() {
Expand All @@ -343,7 +343,7 @@ declare dso_local spir_func i4 @_Z51__builtin_spirv_ClampStochasticRoundFP16ToIn

; CHECK-LLVM-LABEL: hf16_bf8_clamp_stochastic_last_seed
; CHECK-LLVM: %[[#Ptr:]] = alloca i32
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z51__builtin_spirv_ClampStochasticRoundFP16ToE5M2INTELDhiPi(half 0xH3C00, i32 1, ptr %[[#Ptr]])
; CHECK-LLVM: %[[#Call:]] = call i8 @_Z51__builtin_spirv_ClampStochasticRoundFP16ToE5M2INTELDhiPi(half 1.000000e+00, i32 1, ptr %[[#Ptr]])
; CHECK-LLVM: ret i8 %[[#Call]]

define spir_func i8 @hf16_bf8_clamp_stochastic_last_seed() {
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