[AMDGPU][COMGR] Add hotswap entry trampolines#3008
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This was referenced Jun 22, 2026
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Port the non-blit loader behavior from ROCm/rocm-systems#7581 into COMGR's opt-in hotswap entry-trampoline path. Keep COMPUTE_PGM_RSRC3.INST_PREF_SIZE intact and append an s_code_end guard sized from max(INST_PREF_SIZE * 128 - 256, 0) so prefetch from appended stubs stays within readable .text bytes. Enable entry trampolines for the gfx12.5/gfx125 family, including gfx12-5-generic, while keeping B0/A0 instruction patching limited to gfx1250.
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Use COMGR ISA parsing for hotswap target identifiers and centralize gfx12-5-generic metadata. Resolve hotswap stub opcodes through MC assembly parsing instead of TableGen mnemonic names, and add fallback diagnostics for rejected byte replacements.
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Summary
AMD_COMGR_HOTSWAP_ENTRY_TRAMPOLINES.Stack
GitHub cannot use a fork-only branch as the ROCm PR base. The layer-only diff is
harsh-amd:comgr-hotswap-tool-removal...harsh-amd:comgr-hotswap-entry-trampolines.Testing
git diff --check comgr-hotswap-tool-removal..comgr-hotswap-entry-trampolinesmake -j$(nproc) HotswapElfTests HotswapMCTests hotswap-rewriteinbuild-comgr-displacement-sharedbuild-comgr-displacement-shared/test-unit/HotswapElfTestsbuild-comgr-displacement-shared/test-unit/HotswapMCTestsmake -j$(nproc) test-litinbuild-comgr-displacement-shared(70 passed / 11 unsupported)