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sync: rvck #260: RISC-V Nacl扩展支持#227

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xmzzz merged 18 commits into
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May 15, 2026
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sync: rvck #260: RISC-V Nacl扩展支持#227
xmzzz merged 18 commits into
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@ieiao ieiao commented May 14, 2026

Sync commits from rvck PR 260.
Source PR: RVCK-Project/rvck#260

clementleger and others added 18 commits May 14, 2026 20:27
@clementleger @ieiao
riscv: kvm: Use SYM_*() assembly macros instead of deprecated ones
6764553 
mainline inclusion
from mainline-6.7-rc8
commit 683c5bbbf6aea247bc95a7eb9fdfba4fcc8c909a
category: feature
bugzilla: RVCK-Project/rvck#256

--------------------------------

ENTRY()/END()/WEAK() macros are deprecated and we should make use of the
new SYM_*() macros [1] for better annotation of symbols. Replace the
deprecated ones with the new ones and fix wrong usage of END()/ENDPROC()
to correctly describe the symbols.

[1] https://docs.kernel.org/core-api/asm-annotations.html

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
[sync from rvck.]
Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
@clementleger @ieiao
riscv: kvm: use ".L" local labels in assembly when applicable
d872160 
mainline inclusion
from mainline-6.7-rc8
commit e5ff012743cbc3cf13d2243aaaf032a2ca4d0791
category: feature
bugzilla: RVCK-Project/rvck#256

--------------------------------

For the sake of coherency, use local labels in assembly when
applicable. This also avoid kprobes being confused when applying a
kprobe since the size of function is computed by checking where the
next visible symbol is located. This might end up in computing some
function size to be way shorter than expected and thus failing to apply
kprobes to the specified offset.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
[sync from rvck.]
Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
@ruanjinjie-eng @ieiao
riscv: stacktrace: Add USER_STACKTRACE support
977a943 
mainline inclusion
from mainline-6.11
commit 1a7483318274d0ec60f160e604c2a1dbce27fc0a
category: feature
bugzilla: RVCK-Project/rvck#256

--------------------------------

Currently, userstacktrace is unsupported for riscv. So use the
perf_callchain_user() code as blueprint to implement the
arch_stack_walk_user() which add userstacktrace support on riscv.
Meanwhile, we can use arch_stack_walk_user() to simplify the implementation
of perf_callchain_user().

A ftrace test case is shown as below:

	# cd /sys/kernel/debug/tracing
	# echo 1 > options/userstacktrace
	# echo 1 > options/sym-userobj
	# echo 1 > events/sched/sched_process_fork/enable
	# cat trace
	......
	            bash-178     [000] ...1.    97.968395: sched_process_fork: comm=bash pid=178 child_comm=bash child_pid=231
	            bash-178     [000] ...1.    97.970075: <user stack trace>
	 => /lib/libc.so.6[+0xb5090]

Also a simple perf test is ok as below:

	# perf record -e cpu-clock --call-graph fp top
	# perf report --call-graph

	.....
	[[31m  66.54%[[m     0.00%  top      [kernel.kallsyms]            [k] ret_from_exception
            |
            ---ret_from_exception
               |
               |--[[31m58.97%[[m--do_trap_ecall_u
               |          |
               |          |--[[31m17.34%[[m--__riscv_sys_read
               |          |          ksys_read
               |          |          |
               |          |           --[[31m16.88%[[m--vfs_read
               |          |                     |
               |          |                     |--[[31m10.90%[[m--seq_read

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Tested-by: Jinjie Ruan <ruanjinjie@huawei.com>
Cc: Björn Töpel <bjorn@kernel.org>
Link: https://lore.kernel.org/r/20240708032847.2998158-3-ruanjinjie@huawei.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
[sync from rvck.]
Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
@zcxGGmu @ieiao
riscv: perf: add guest vs host distinction
9e88bc6 
mainline inclusion
from mainline-6.12-rc6
commit 5bb5ccb3e8d8dba29941cd78d5c1bcd27b227b4a
category: feature
bugzilla: RVCK-Project/rvck#256

--------------------------------

Introduce basic guest support in perf, enabling it to distinguish
between PMU interrupts in the host or guest, and collect
fundamental information.

Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/a67d527dc1b11493fe11f7f53584772fdd983744.1728957131.git.zhouquan@iscas.ac.cn
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
[sync from rvck.]
Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
@zcxGGmu @ieiao
riscv: KVM: add basic support for host vs guest profiling
a6c8a2d 
mainline inclusion
from mainline-6.12-rc6
commit eded6754f398b5b4950e8f593f75fee63a8b49ad
category: feature
bugzilla: RVCK-Project/rvck#256

--------------------------------

For the information collected on the host side, we need to
identify which data originates from the guest and record
these events separately, this can be achieved by having
KVM register perf callbacks.

Signed-off-by: Quan Zhou <zhouquan@iscas.ac.cn>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/00342d535311eb0629b9ba4f1e457a48e2abee33.1728957131.git.zhouquan@iscas.ac.cn
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
[sync from rvck.]
Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
@avpatel @ieiao
RISC-V: KVM: Order the object files alphabetically
185f6f9 
mainline inclusion
from mainline-6.12-rc6
commit e403a90ad65628d32843f5d40542502659bc4573
category: feature
bugzilla: RVCK-Project/rvck#256

--------------------------------

Order the object files alphabetically in the Makefile so that
it is very predictable inserting new object files in the future.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-2-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
[sync from rvck.]
Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
@avpatel @ieiao
RISC-V: KVM: Save/restore HSTATUS in C source
e473574 
mainline inclusion
from mainline-6.12-rc6
commit b6114a7e2433e91fedee3ed983abf77b3ebc167c
category: feature
bugzilla: RVCK-Project/rvck#256

--------------------------------

We will be optimizing HSTATUS CSR access via shared memory setup
using the SBI nested acceleration extension. To facilitate this,
we first move HSTATUS save/restore in kvm_riscv_vcpu_enter_exit().

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-3-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
[sync from rvck.]
Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
@avpatel @ieiao
RISC-V: KVM: Save/restore SCOUNTEREN in C source
cfa9263 
mainline inclusion
from mainline-6.12-rc6
commit b922307a5fecfcf33ca1697f6ec33c9274b75c46
category: feature
bugzilla: RVCK-Project/rvck#256

--------------------------------

The SCOUNTEREN CSR need not be saved/restored in the low-level
__kvm_riscv_switch_to() function hence move the SCOUNTEREN CSR
save/restore to the kvm_riscv_vcpu_swap_in_guest_state() and
kvm_riscv_vcpu_swap_in_host_state() functions in C sources.

Also, re-arrange the CSR save/restore and related GPR usage in
the low-level __kvm_riscv_switch_to() low-level function.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-4-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
[sync from rvck.]
Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
@avpatel @ieiao
RISC-V: KVM: Break down the __kvm_riscv_switch_to() into macros
bd33756 
mainline inclusion
from mainline-6.12-rc6
commit 8f57adac39167de7416c7eae91b4621454def3cd
category: feature
bugzilla: RVCK-Project/rvck#256

--------------------------------

Break down the __kvm_riscv_switch_to() function into macros so that
these macros can be later re-used by SBI NACL extension based low-level
switch function.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-5-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
[sync from rvck.]
Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
@avpatel @ieiao
RISC-V: KVM: Replace aia_set_hvictl() with aia_hvictl_value()
ea117aa 
mainline inclusion
from mainline-6.12-rc6
commit 5d8f7ee9286e981449416ce20bba6546995f585a
category: feature
bugzilla: RVCK-Project/rvck#256

--------------------------------

The aia_set_hvictl() internally writes the HVICTL CSR which makes
it difficult to optimize the CSR write using SBI NACL extension for
kvm_riscv_vcpu_aia_update_hvip() function so replace aia_set_hvictl()
with new aia_hvictl_value() which only computes the HVICTL value.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-6-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
[sync from rvck.]
Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
@avpatel @ieiao
RISC-V: KVM: Don't setup SGEI for zero guest external interrupts
28eff53 
mainline inclusion
from mainline-6.12-rc6
commit 15ff2ff3c3b99f986fde919dffab27007bbe35ed
category: feature
bugzilla: RVCK-Project/rvck#256

--------------------------------

No need to setup SGEI local interrupt when there are zero guest
external interrupts (i.e. zero HW IMSIC guest files).

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-7-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
[sync from rvck.]
Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
@avpatel @ieiao
RISC-V: Add defines for the SBI nested acceleration extension
cc0e01b 
mainline inclusion
from mainline-6.12-rc6
commit 5daf89e73d77a5edb21c9b2d67a1b5bf02e61e5a
category: feature
bugzilla: RVCK-Project/rvck#256

--------------------------------

Add defines for the new SBI nested acceleration extension which was
ratified as part of the SBI v2.0 specification.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-8-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
[sync from rvck.]
Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
@avpatel @ieiao
RISC-V: KVM: Add common nested acceleration support
b35f382 
mainline inclusion
from mainline-6.12-rc6
commit d466c19cead5904d4d5d92adb2b213b411d3b849
category: feature
bugzilla: RVCK-Project/rvck#256

--------------------------------

Add a common nested acceleration support which will be shared by
all parts of KVM RISC-V. This nested acceleration support detects
and enables SBI NACL extension usage based on static keys which
ensures minimum impact on the non-nested scenario.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-9-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
[sync from rvck.]
Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
@avpatel @ieiao
RISC-V: KVM: Use nacl_csr_xyz() for accessing H-extension CSRs
ea2d7d4 
mainline inclusion
from mainline-6.12-rc6
commit e28e6b69767b3aea73eda0fd3e7b4e1c15a7ebec
category: feature
bugzilla: RVCK-Project/rvck#256

--------------------------------

When running under some other hypervisor, prefer nacl_csr_xyz()
for accessing H-extension CSRs in the run-loop. This makes CSR
access faster whenever SBI nested acceleration is available.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-10-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
[sync from rvck.]
Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
@avpatel @ieiao
RISC-V: KVM: Use nacl_csr_xyz() for accessing AIA CSRs
ea732f1 
mainline inclusion
from mainline-6.12-rc6
commit dab55604aec572cfa2bc6b51be288da1ac4c7366
category: feature
bugzilla: RVCK-Project/rvck#256

--------------------------------

When running under some other hypervisor, prefer nacl_csr_xyz()
for accessing AIA CSRs in the run-loop. This makes CSR access
faster whenever SBI nested acceleration is available.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-11-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
[sync from rvck.]
Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
@avpatel @ieiao
RISC-V: KVM: Use SBI sync SRET call when available
0686565 
mainline inclusion
from mainline-6.12-rc6
commit 68c72a6557b072bff79658b9c0fdb0e69148e32d
category: feature
bugzilla: RVCK-Project/rvck#256

--------------------------------

Implement an optimized KVM world-switch using SBI sync SRET call
when SBI nested acceleration extension is available. This improves
KVM world-switch when KVM RISC-V is running as a Guest under some
other hypervisor.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-12-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
[sync from rvck.]
Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
@avpatel @ieiao
RISC-V: KVM: Save trap CSRs in kvm_riscv_vcpu_enter_exit()
328a6b5 
mainline inclusion
from mainline-6.12-rc6
commit 3e7d154ad89be46b41bb47a0a8a19ecf8e0ca3f3
category: feature
bugzilla: RVCK-Project/rvck#256

--------------------------------

Save trap CSRs in the kvm_riscv_vcpu_enter_exit() function instead of
the kvm_arch_vcpu_ioctl_run() function so that HTVAL and HTINST CSRs
are accessed in more optimized manner while running under some other
hypervisor.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-13-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
[sync from rvck.]
Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
@avpatel @ieiao
RISC-V: KVM: Use NACL HFENCEs for KVM request based HFENCEs
c7ea89b 
mainline inclusion
from mainline-6.12-rc6
commit 5bdecd891e505a9f98a50998aa60a60568f58c3c
category: feature
bugzilla: RVCK-Project/rvck#256

--------------------------------

When running under some other hypervisor, use SBI NACL based HFENCEs
for TLB shoot-down via KVM requests. This makes HFENCEs faster whenever
SBI nested acceleration is available.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-14-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Gao Rui <gao.rui@zte.com.cn>
[sync from rvck.]
Signed-off-by: WeiHao Li <cn.liweihao@gmail.com>
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github-actions Bot commented May 14, 2026 •
edited
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开始测试 log: https://github.com/RVCK-Project/rvck-olk/actions/runs/25860443022

参数解析结果
args value
repository RVCK-Project/rvck-olk
head ref pull/227/head
base ref OLK-6.6
LAVA repo RVCK-Project/lavaci
LAVA hardware
LAVA Testcase path
need run job kunit-test,kernel-build,check-patch,lava-trigger

测试完成

详细结果:
check result
kunit-test failure
kernel-build success
check-patch success
lava-trigger-qemu skipped
lava-trigger-sg2042 skipped
lava-trigger-k1 skipped
lava-trigger-lpi4a skipped

Kunit Test Result

kunit test failed

Kernel Build Result

Check Patch Result
Total Errors 0
Total Warnings 1

@xmzzz xmzzz merged commit c7ea89b into RVCK-Project:OLK-6.6 May 15, 2026
9 of 11 checks passed
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6 participants

@ieiao @xmzzz @clementleger @ruanjinjie-eng @zcxGGmu @avpatel