Added Pcell TG switch and Chopper Switch from genYZ team

[aurxdeqo]

This PR adds two new parametric cells :

1. tgswitch: A core transmission switch cell.
2. chopper_switch: A differential chopper switch built using the tgswitch cell.

Functionality of the Cells

1. tgswitch

• Creates a transmission gate composed of one nmos and one pmos transistor.
• The sources and drains of the two FETs are routed together.
• Supports three placement options via the placement argument:
  • vertical (default): PMOS on top, NMOS on bottom.
  • vertical_inv: NMOS on top, PMOS on bottom (mirrored).
  • horizontal: PMOS on the left, NMOS on the right.
• Uses via_stack to create explicit met3 I/O ports for "VIN" (source) and "VOUT" (drain).
• The add_tgswitch_labels function adds met2 and met3 pins and text labels for: VDD, VSS, VIN, VOUT, CLK, and CLKinv.

2. cswitch

• Creates a differential chopper switch, built from four tgswitch components arranged in a 2x2 grid.
• It alternates the signal polarity between the differential inputs (VINP/VINN) and outputs (VOUTP/VOUTN).
• The opposing control signals, CLK and CLKINV, determine which tgswitch path is active, selecting either a straight-through or a crossover connection.
• Includes a surrounding tapring for substrate connection.
• Includes explicit VDD and VSS power rail routing on met3.
• The add_cswitch_labels function adds pins and text labels for all I/Os and power.

PDK Compatibility
These components are designed to be compatible with both gf180 and sky130, however, they have only been formally verified for the gf180 PDK.

Components Used

1. tgswitch

• glayout.nmos
• glayout.pmos
• glayout.via_stack
• glayout.routing.c_route
• glayout.routing.straight_route
• gdsfactory.components.rectangle

2. cswitch

• TGSW.tgswitch (the other component in this PR)
• glayout.via_stack
• glayout.via_array
• glayout.tapring
• glayout.routing.straight_route
• glayout.routing.L_route
• gdsfactory.components.rectangle

Both components are DRC clean using glayout's Magic DRC for gf180. The detailed DRC reports can be seen in the README.md file within each component's respective folder.

[msaligane]

This is great. I would add a regression test for DRC/LVS and a little documentation.
Sapta will add more comments on the spice generation. Thanks!