PCI Capability pointers need to be DWORD aligned #2
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This might require more investigation. I tested this change on the pcie example and it now fails so i'm missing something to be compatible with both ARM and x86. https://github.com/Xilinx/systemctlm-cosim-demo/tree/master/pcie/versal |
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Was testing integrating time accurate NVMe SSDs into qbox using this library and found that in ARM architecture it's important that the PCI capability pointers are dword aligned. Otherwise during enumeration the host reads the wrong offset and fails to read all of the capabilities which would break MSI-X capability for example. Added assert if capability pointer is dword aligned and adjusted the PCI express capability size so it's dword aligned.
qbox PR that is dependent: quic/qbox#34