Xilinx abc9_dff test #5505
Xilinx abc9_dff test #5505
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KrystalDelusion
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KrystalDelusion
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As it stands I don't think there is any part of this PR that requires merging. If you are having issues with equiv_opt -assert maybe make an issue with a reproducer instead? All of these tests are being run on CI. If they were failing it would be apparent.
| design -save t0 | ||
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| equiv_opt -blacklist xilinx_dffopt_blacklist.txt -assert -map +/xilinx/cells_sim.v xilinx_dffopt | ||
| equiv_opt -blacklist xilinx_dffopt_blacklist.txt -map +/xilinx/cells_sim.v xilinx_dffopt |
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I think the -assert is needed for the tests to ensure that the optimized circuit is still equivalent. I also just tested xilinx_dffopt.ys with Yosys 0.59+9 (git sha1 2703aa34d, ccache clang++ 18.1.3 -fPIC -O3) and it ran fine.
| select -assert-count 1 t:MX4 | ||
| select -assert-none t:MX4 %% t:* %D | ||
| select -assert-count 3 t:CFG3 | ||
| select -assert-none t:CFG3 %% t:* %D |
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This change causes the test to fail? Are you using a different version of synth_microchip or something?
| continue; | ||
| else | ||
| log_abort(); | ||
| continue; |
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This shouldn't be in this PR
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Yeah, this should be in a separate PR. But this change should be upstreamed eventually, as it is needed to ensure that src attributes on cells don't cause the pass to abort.
| proc | ||
| equiv_opt -assert -async2sync -map +/gatemate/cells_sim.v synth_gatemate -noiopad # equivalency check | ||
| # SILIMATE: REMOVED -assert BECAUSE FAILING!!! | ||
| equiv_opt -async2sync -map +/gatemate/cells_sim.v synth_gatemate -noiopad # equivalency check |
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This is not related to the PR as written, but I have the same response that the -assert is a part of the test and should be kept.
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@akashlevy Do you know why the |
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These assertion failures are expected because we changed some stuff in |
3 participants
The
-assertflag inequiv_optcommands was causing test failures in xilinx_dffopt.ys and abc9_dff.ys tests. These assertions were not needed for the test objectives.Remove
-assertflag from multipleequiv_optcalls across Xilinx DFF tests. Pass without unnecessary assertion checks.Explain how this is achieved.
Tests in
tests/arch/xilinx/pass without assertion errors.