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feat(agc): render layered draws into 3D color targets - #1077
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Thanks. Build and ctest are green merged onto current main (396/396). Before this can go in, part of it needs to come out and a test needs to go in:
- Overlap with #423: please drop that part. #423 (open since 2026-10-02) already adds
ShaderVertexStageInfo::paClVsOutCntland plumbs it throughRecompiler.hpp,CacheKey.hpp,RequestSerializer.cpp(version 9),DrawLookup.cpp,sameVertexInfoandShaderInputInfoBuilder.cpp, with its round-trip test inShaderMemory.cpp. This PR adds the same plumbing again. CONTRIBUTING asks that no two open PRs implement the same thing. TheDraw.cpp:139assignment also collides: #423 stores the clip/cull bits in that field and this PR storesgraphics.layerExports, so whichever lands second drops the other's bits. Please remove the duplicated plumbing, list #423 under Depends on, and add the layer bits (USE_VTX_RENDER_TARGET_INDX, VS_OUT_MISC_VEC_ENA) to #423's mask for layered draws. The rest of the PR stays as it is: theCB_COLOR_VIEWslice range, the 2D-array attachment views, the framebuffer layers, theVK_EXT_shader_viewport_index_layerpath and the validation. - No test of the layered draw itself. The new tests cover the register decode, the serializer and which capability the SPIR-V declares, but nothing renders. The 2D-array attachment view of a 3D image (
Texture.cpp:998-1001), the framebuffer layer count (Pipeline.cpp:73-74) and gl_Layer selecting the slice relative toSLICE_STARTare never run. An execution test that draws into a 4-slice 3D target with a view of slices 1..3 (one primitive per layer via the misc export), then reads every slice back, would pin it. Slice 0 should stay untouched and slices 1-3 should hold their primitive's value. lavapipe exposesVK_EXT_shader_viewport_index_layer, so it runs on CI.tests/Mesh.cppandtests/execution/Pixel*.cppalready have the draw harness. - Minor:
ShaderValidation.cpp:112now accepts a per-primitiveLayeroutput in mesh stages, butvalidationTestsonly covers the vertex case. A mesh case would cover it.
We couldn't check the slice mapping on hardware: our oracle only runs compute, not draws. The TechnicalDebt line covering that is fine.
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@adriadam10 Thanks. All three points are done in 6017bd9, and the branch is now stacked on #423.
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CI fix in d86365c. The Windows build lacked |
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Status update. NVIDIA routing (@adriadam10's review): @orishamir found the cause: the dynamic-rendering path that devices with pipeline libraries take sets Waiting on #423: this PR needs #423's Testing it now: #3763 (@eljackjoestar-cmd) carries this PR rebased onto a recent AI-assisted: yes (Claude Code) |
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Other open pull requests touch the same code. Merging one will break the other, or both implement the same thing. If this one builds on them, list them in Depends on.
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Kena (PPSA01746) needs the DCC part of this. On I printed the decoded target in front of that check: slot 0, 64 slices, max mip 0, DCC enabled ( I could not run the title on this branch, it conflicts with |
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Closing as merged through #3763: your commits are on main with your authorship ( |
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Yes, it gets past that check. On The |
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@fma-rc I hit the same
The AI-assisted: yes (Claude Code) |
What
Layered draws into 3D color targets render, where they were rejected with
color views of several array slices are unsupported. Titles fill a volume with one instanced draw:CB_COLOR_VIEWcovers several depth slices, and the vertex stage picks each primitive's slice through the misc position export (PA_CL_VS_OUT_CNTLUSE_VTX_RENDER_TARGET_INDX with VS_OUT_MISC_VEC_ENA).Builds on #423, which carries
PA_CL_VS_OUT_CNTLto the recompiler. Until it merges, the bottom of this branch carries #423 at 577b8d5 squashed into one commit (author kept), withPA_CL_VS_OUT_CNTLread from request version 17 becausemainnow writes 16, followed by @johnmaia's b599cfc (prepare vertex programs with the position export layout), which #423 is taking in. This PR isfeat(agc): render layered draws into 3D color targetsplus two test commits formain's changes (the legacy vertex info test reads version 16; the layered test passes the new GPU flag toMutation::Add).DecodeColorBuffertakes the slice range of a 3D target intoColorTarget::layers, clamped to the surface's last slice. It allows DCC on 3D targets and sizes a tiled 3D target by its whole surface (SurfaceForTargetmoves toState.cpp).DecodeStatesetsState::renderLayersand, for a layered draw, USE_VTX_RENDER_TARGET_INDX (State::layerExports). Targets of different slice counts and layered draws with a depth target throw.State::layerExportsinto thePA_CL_VS_OUT_CNTLbits that feat(agc): vertex clip and cull distances #423 passes. feat(agc): vertex clip and cull distances #423 already passes VS_OUT_MISC_VEC_ENA, so only the render target index is added, and only for layered draws. Elsewhere the layer export stays ignored, as before.gl_LayerdeclaresShaderViewportIndexLayerEXTandSPV_EXT_shader_viewport_index_layerwhen the device offers them, instead of SPIR-V 1.5ShaderLayer, which the driver's Vulkan 1.1 target cannot take. The device enablesVK_EXT_shader_viewport_index_layerwhen present. Graphics validation accepts the capability, the extension and a vertexLayeroutput when it is enabled, and a per-primitiveLayeroutput of a mesh stage.Tested
Linux 7.2.9 (Arch), Mesa 26.2.4 RADV, RX 9070 XT.
agc_driver_layered_volume_draw. It draws into a 4-slice, 64 KiB-tiled RGBA8 volume through a view of slices 1..3, three bands with one per layer (the layer comes from the misc export), and reads every slice back with the R_X swizzle equation (its slice input included). Slice 0 stays untouched and slice 1 + L holds only band L. WithpaClVsOutCntlleft at 0, it fails as expected (layer 1's band lands in slice 1). It skips withoutVK_EXT_shader_viewport_index_layer, which lavapipe has.exp pos1), checks that it declares aLayeroutput, and validates it against the layered state. Without the meshLayerrule in the validator, this case fails. It does not draw, because lavapipe's LLVM backend aborts while compiling that mesh pipeline (Cannot emit physreg copy instruction), which a test cannot catch. On RADV the same mesh draw renders the bands into the right slices.agc_vertex_layer_exportrecompiles a vertex shader with a misc layer export. It declares the extension's capability under SPIR-V 1.3 when it is offered,ShaderLayerwith SPIR-V 1.5 when it is not, and nogl_Layerwithout USE_VTX_RENDER_TARGET_INDX.agc_driver_graphicscovers the slice-range decode (layers, clamping, refusals, a DCC 3D target, the export bit) and the validation of a vertexLayeroutput with and without the extension.writable guest memory overlaps an immutable snapshot), which is not part of this PR.cteston feat(agc): vertex clip and cull distances #423 + this PR: 397 of 397 pass; 468 of 468 after the rebase onto feat(agc): vertex clip and cull distances #423's current head.main90c152e (2026-10-11): fullctest818/818 pass (4video_out_flip_*skipped), RX 9070 XT, RADV.agc_driver_layered_volume_drawdraws (not skipped).tools/check_conventions.pypasses.main(with scripted pad input only): plainmainaborts after about 35 s atcolor views of several array slices are unsupportedon its 64x64x64 lighting volumes. With this branch it records those draws and next stops after about 38 s at AGC: storage image access to depth/stencil surface 0x201a800000 is not implemented #1409 (storage image access to depth/stencil surface ... is not implemented).Checklist
main; no other open PR implements the same functionsNotImplemented_nid_no_patch); silent stubs are listed in TechnicalDebt.mdfiles or images added to the repository (attach them to this PR)🤖 Generated with Claude Code