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fix(recompiler): v_readfirstlane_b32 of an empty EXEC reads lane 0 - #445
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oneandonlydean merged 1 commit intoOct 3, 2026
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With no lane active the hardware reads lane 0. The emitter shuffled from the ballot's first lane: OpGroupNonUniformBallotFindLSB of an empty ballot is undefined, and the two-lane wave64 path computed lane 31 (FindILsb of the empty high word plus 32). Lane 0 is now selected when the ballot is empty. Tests: agc_driver_read_first_lane_tests runs v_readfirstlane_b32 in a wave32 and a wave64 compute shader with EXEC empty and with a later first active lane.
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What
With no lane active,
v_readfirstlane_b32reads lane 0 on hardware (the RDNA ISA gives the lane as the first set bit of EXEC, or lane 0 when EXEC is zero).EmitReadFirstLaneshuffled from the ballot's first lane without that case:OpGroupNonUniformBallotFindLSBof an empty ballot is undefined in SPIR-V (on my RTX 4090 it gave lane 31);FirstLanetakesFindILsb(high) + 32when the low word is empty, and withFindILsb(0) = -1that is lane 31.The emitter now selects lane 0 when both ballot words are zero, and the first active lane otherwise.
The v_writelane half of this area went in with #254. #322 (v_readlane lane wrap) and #411 (v_writelane and EXEC) edit the functions right below this one; this branch merges cleanly with each of them, alone and both together.
Tested
BUILD_TESTING=ONandctestpass.agc_driver_read_first_lane_tests(tests/execution/ReadFirstLane.cpp, exits 77 without Vulkan): a wave32 and a wave64 compute shader each dov_readfirstlane_b32of0x100 + lanewith EXEC empty (expects lane 0) and with only lanes 4 and 5 (wave32) or 40 and 41 (wave64) active, and store both results from every lane. On this GPU the wave64 shader takes the two-lane path. Against main it fails with "read first lane wave32: lane 0 result 0 is 287, expected 256" (lane 31).Checklist
main; no other open PR implements the same functionsNotImplemented_nid_no_patch); silent stubs are listed in TechnicalDebt.mdfiles or images added to the repository (attach them to this PR)