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feat(agc): emulate default eight-sample dithered alpha coverage - #4451

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adriadam10 merged 2 commits into
boykopovar:mainfrom
Amoenus:codex/feat-alpha-to-coverage-dither8
Oct 14, 2026
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adriadam10 merged 2 commits into
boykopovar:mainfrom
Amoenus:codex/feat-alpha-to-coverage-dither8

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@Amoenus

@Amoenus Amoenus commented Oct 12, 2026 •

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What

Emulate default dithered alpha-to-coverage (DB_ALPHA_TO_MASK=0x18701) for eight standard samples and FP16_ABGR/32_ABGR exports. Carry the mode through draw/shader keys and serialized requests. Unsupported sample counts, custom locations, EQAA combinations and dithered normalized exports throw.

Sonic Unleashed Recompiled, PPSA99902/01.003.000, historically stopped after the opening movie in our conditional integration at:

dithered or rounded alpha-to-coverage is unsupported (register 0x2dc = 0x00018701)

The historical pinned-main state control fails and the candidate accepts this mode with the separate covered-centroid bit isolated. #4556 is now merged. This independently buildable change still needs the title's other startup/MSAA work to reach that draw; this rebased head has not been replayed on the title. Current bring-up: #4443; captured state and measurements: #4285.

Semantics: the 64-bin per-quad table was measured on Windows AMD1002:13c0/driver32.0.21036.18; independent gfx1036/RADV Mesa25.2.8 measurements and RTX3090 validation support the masks, accounting for coarse shading. The Windows campaign covered neighboring FP32/FP16 values, sample identity, quad parity, signed zeros, NaNs/infinities and scissor preservation. Native NVIDIA coverage differs, so the shader writes the measured mask and Vulkan alpha-to-coverage stays disabled. Pinned PAL and RADV associate the mode with offsets3/1/0/2 and OFFSET_ROUND. No PS5/gfx1013 measurement is claimed.

Review corrections retained: existing undithered handling, including the disable bit and single-sample MSAA guard, is preserved. The new disable override applies only to dithered coverage. The original debt paragraph/pinned AlphaToCoverage.cpp link remains, with two dither sentences.

Tested

Published head: 246d16a03, based on main 4f618898504e2d73fed5ff9fa414cdf32a8f60b7. The previous tested365 head is preserved on fork branch codex/alpha-tested-before-main4f. This rebase preserves merged #5521's undithered targetless32_AR handling and its no-MRT0-export refusal. Dithered32_AR remains explicitly unsupported; its rejection fixture now covers that format as well as FP32_R/FP32_GR. Reviewed undithered behavior and debt wording remain intact.

Main's canonical24 adds tessellation fields, so dither uses 25. Version21 dual layouts and mandatory22+ F16 tails remain unchanged. An independently compiled, unmodified main1209 serializer/headers emits12 sentinel requests; version24 compatibility preserves layer export, non-default primitiveGroupSize/breakAtInstance, draw fields and F16 tails, alongside the retained older-format fixtures.

Windows11 Enterprise26200, WinLibs GCC15.2.0r7/Ninja Release, bundled dependencies, SPIRV-Tools ON, ASAN OFF. Full build/libs, conventions, registration and branch diff whitespace check pass. Three compatibility/undithered controls pass20 repetitions (maximum0.850409s). 13 relevant groups pass five repetitions in both NVIDIA GPL modes, without skips (maximum5.44858s). Later main23e93c054 has a clean merge preview, which is unbuilt; contribution guidance is unchanged.

AMD1002:13c0/32.0.21036.18: failures stop on the first execution; passing groups complete five. No selected skips.

Group GPL on GPL off
Existing standard coverage Fail first Pass ×5
New dithered coverage Fail first Pass ×5
BDA span /wave32 exec-lane /wave32 subgroup Pass ×5 each Fail first each
Other eight controls Pass ×5 each Pass ×5 each

CPU/helper controls do not establish independent AMD hardware coverage. GPU-selection logs confirm AMD for the native failures, native coverage and prepared draws.

Earlier matched-main comparison (retained pin): unmodified main872 is rebuilt in the same checkout/build directory for five existing controls (full runtime libraries and those executables), then the candidate is restored/full rebuilt. On both main and restored candidate, NVIDIA passes all five ×5 in both modes; AMD standard-alpha fails GPL-on and the BDA/wave32 trio fail GPL-off with the same diagnostics. This establishes reproduction on main872; the new main4f-based candidate retains those failure groups, but this slice does not repeat a matched unmodified-main4f control. Main has no dithered fixture, so it does not independently exclude a dither-specific regression. #4768 maintains the matrix, pins and limits; #3291 retains the BDA validation.

GPL on means APS5_NO_GPL absent; off means1. Vulkan is required, the AnyPS5 shader cache is disabled, and each test has a30s bound. This slice does not repeat layered-volume, placement, LTO, PS5/native-console, driver-cache-coldness or full-suite campaigns. The independent Linux measurements above retain their original heads. Full upstream Linux/Windows PR jobs remain maintainer-triggered; local results are not a full CI pass.

Checklist

  • Based on current main at the frozen test start; later main merge preview clean; no other open PR implements this dithered mode (merged fix(agc): alpha-to-coverage from a 32_AR MRT0 export without a color target #5521 targetless32_AR behavior retained)
  • One topic per PR; follow-ups go in a new PR
  • No comments in code except technical debt
  • Unimplemented paths throw; no silent success or fallback added
  • No notes, investigation .md files or images added to the repository
  • New third-party code is a submodule built from source (none added)
  • Generic behaviour, not specific to one title
  • Depends on: none
  • Unblocks: PPSA99902 Sonic Unleashed Recompiled (PPSA99902): initial gameplay on fork and remaining work #4443, conditional dithered-alpha state stop
  • GPUs tested: NVIDIA GeForce RTX5080,driver610.62; AMD Radeon(TM) Graphics1002:13c0/gfx1036,driver32.0.21036.18; both Windows11 Enterprise26200. Failures and independent external measurements are scoped above.
  • AI-assisted: yes (Codex); author responsible for every line

@simonbbby

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I ran PR #4451 (head 5a101c5) on Linux with real 8x targets. I also compared its table with native alpha-to-coverage on the chip that the Windows table came from (PCI 1002:13c0). The StoreDitheredAlphaCoverage table matches native gfx1036 coverage at DB_ALPHA_TO_MASK = 0x18701 bit for bit. The new GPU test passes on RADV and on an RTX 3090.

Setup: 5a101c5 on main 3d8ffeb, Ubuntu 24.04, Linux 7.0, GCC 13.3, Release with BUILD_TESTING=ON and ANYPS5_ENABLE_SPIRV_TOOLS=ON. Devices: AMD Radeon gfx1036 (RDNA2 iGPU of a Ryzen 9 9950X, PCI 1002:13c0) on RADV Mesa 25.2.8; RTX 3090 on NVIDIA 595.99.02; llvmpipe (Mesa 25.2.8). Every log's Selected GPU line shows the requested device.

Native coverage on gfx1036

For a plain 8x alpha-to-coverage draw, RADV programs offsets 3,1,0,2 with OFFSET_ROUND and the enable bit. That is 0x18701, the value PPSA99902 uses (radv_cmd_buffer.c L11209-11219).

I turned on alphaToCoverageEnable behind an env var and turned off the PR's shader emulation (patch below, not for merging). A sweep then ran 406 cases: alpha k/64 for k = 0..64 with the float on each side, plus ±0, ±min denormal, ±inf, ±NaN, 2.0, -1 and the max finite value, each through FP16_ABGR and 32_ABGR export. Every case checks all 128x128 pixels in the scissor and that pixels outside it stay untouched.

native run, gfx1036 unless noted rows matching the PR table
RADV_DEBUG=novrsflatshading, APS5_NO_GPL=1, 3 runs 406/406 each
same, with pipeline libraries on, or with sample locations off 406/406 each
same, RGBA32F 8x target, 2 runs 406/406 each
the PR's --dithered8 check on native coverage passes 5/5
control: novrsflatshading,noatocdithering (0xaa01) 34/406; --dithered8 fails 5/5
control: RTX 3090 native (d8 on every pixel at 0.5) 34/406; --dithered8 fails 5/5
RADV default state (no novrsflatshading) 34/406; see below

The 34 rows that match everywhere are the all-00 and all-ff cases. With the RGBA16F target, RADV picks the export format from the attachment, so true FP32 alpha reaches the DB only on the RGBA32F target. Key FP32 rows there, masks in 2*(x&1)+(y&1) order:

alpha bits masks
0x3c7fffff 00
0x3c800000 (1/64) 10,00,00,00
0x3f000000 (0.5) 35,36,36,35
0x3f77ffff ff,f7,ff,ff
0x3f780000 (62/64) ff,7f,ff,ff
0x3f7fffff, 0x3f800001, +inf, 2.0, max finite ff
±NaN, -inf, -1, -0, -min denormal 00

So on gfx1036 the DB produces this table at 0x18701, independent of the register value the Windows driver uses. The "inferred from PAL" sentence in TechnicalDebt.md can also cite the RADV source and this measurement. Two limits stay: the register value comes from driver source, not from a register read, and gfx1013 equivalence is still open.

RADV default state: 2x2 coarse shading

On gfx10.3, RADV turns on 2x2 coarse shading for pixel shaders that allow flat shading (gfx103_pipeline_vrs_coarse_shading). The test's constant-colour shader allows it. Each 2x2 block then shares one mask, and the dither shows up as a 4x4 tile that takes byte 2*((x>>1)&1)+((y>>1)&1). All 406 rows fit that model, and --dithered8 fails 5/5:

dithered coverage export 9 alpha 0x3c800000 pixel (1,0): resolved 0.233398438, expected 0.249023438 for mask0x00

RADV_DEBUG=novrsflatshading alone restores the per-pixel table. nobinning, nohiz, nodcc, nofmask, nofastclears and nongg don't change the pattern. The emulated shader reads FragCoord, which turns off flat shading in RADV, so it matches 406/406 at RADV's default state. This only matters when someone repeats a native dithered check on RADV gfx10.3 by turning on alphaToCoverageEnable. Such a check needs novrsflatshading or a shader that reads FragCoord.

Emulation on Linux

RADV gfx1036 RTX 3090 llvmpipe
agc_driver_dithered_alpha_to_coverage, 5 runs 5/5 5/5 skipped (77)
agc_driver_alpha_to_coverage_state and agc_driver_alpha_to_coverage, 5 runs 5/5 each 5/5 each 5/5 each
406-case sweep through the emulation 406/406, GPL on and off 406/406 skipped (77)
same sweep, RGBA32F target 406/406 406/406 not run
main 3d8ffeb, agc_driver_alpha_to_coverage, 5 runs 5/5 5/5 5/5

llvmpipe skips with eight-sample color attachments are unavailable: AGC graphics: the device cannot render color with the target's sample count. At a load average of about 5, the dithered test takes 2.17-2.20 s on RADV and 2.30-2.51 s on the 3090. With other builds running (load about 57) it took 4.4-5.8 s. That is longer than the 0.742 s in the PR description, but far under the 30 s TIMEOUT.

Undithered 8x

#4451 throws undithered multisample alpha-to-coverage is unsupported for 0xaa01 at 8 samples. The noatocdithering control measured that case: every pixel in a row gets the same mask, and the level changes at each multiple of 1/16.

0xaa01, 8 samples, gfx1036, FP16 export
alpha from mask
0 (and below 1/16) 00
1/16 10
1/8 04
3/16 14
1/4 12
5/16 32
3/8 16
7/16 36
1/2 35
9/16 75
5/8 3d
11/16 7d
3/4 77
13/16 f7
7/8 7f
15/16 and above ff

Not tested

  • gfx1013. gfx1036 is gfx10.3; the PS5 is gfx10.1.
  • Other gfx10.3 chips. Only this gfx1036 was measured.
  • A hardware read of DB_ALPHA_TO_MASK. umr needs root on this machine.
  • PPSA99902 itself.
  • Driver shader caches were not controlled.
Native switch and commands
--- a/core/libs/prx/libSceAgcDriver/Graphics/src/Pipeline.cpp
+++ b/core/libs/prx/libSceAgcDriver/Graphics/src/Pipeline.cpp
@@ bool libraryKeys(...)
     appendKey(keys.fragmentOutput, state.samples);
+    appendKey(keys.fragmentShader, std::getenv("A2C_NATIVE") != nullptr && state.alphaToCoverage);
+    appendKey(keys.fragmentOutput, std::getenv("A2C_NATIVE") != nullptr && state.alphaToCoverage);
@@ Pipeline::Pipeline(...)
         samples.rasterizationSamples = static_cast<VkSampleCountFlagBits>(state.samples);
+        samples.alphaToCoverageEnable = (std::getenv("A2C_NATIVE") != nullptr && state.alphaToCoverage) ? VK_TRUE : VK_FALSE;
--- a/core/libs/prx/libSceAgcDriver/tests/execution/AlphaToCoverage.cpp
+++ b/core/libs/prx/libSceAgcDriver/tests/execution/AlphaToCoverage.cpp
@@ void Draw(...)
     prepared.ditheredAlphaToCoverage = dithered;
+    if (std::getenv("A2C_NATIVE") != nullptr) {
+        prepared.alphaToCoverage = false;
+        prepared.ditheredAlphaToCoverage = false;
+    }
@@ void Draw(...)
     fragment.context.pixel->ditheredAlphaToCoverage = state.ditheredAlphaToCoverage;
+    if (std::getenv("A2C_NATIVE") != nullptr) {
+        fragment.context.pixel->alphaToCoverage = false;
+        fragment.context.pixel->ditheredAlphaToCoverage = false;
+    }
cmake -S . -B build -G Ninja -DCMAKE_BUILD_TYPE=Release -DBUILD_TESTING=ON -DANYPS5_ENABLE_SPIRV_TOOLS=ON
cmake --build build --parallel 12
# unmodified head; ANYPS5_GPU=NVIDIA or llvmpipe for the other columns
ANYPS5_GPU=RADV ctest --test-dir build -R '^agc_driver_(dithered_alpha_to_coverage|alpha_to_coverage_state|alpha_to_coverage)$' --repeat until-fail:5
# with the patch: passes; without novrsflatshading, or with noatocdithering added, it fails
A2C_NATIVE=1 APS5_NO_GPL=1 ANYPS5_NO_SHADER_CACHE=1 ANYPS5_GPU=RADV RADV_DEBUG=novrsflatshading \
  build/tests/agc_driver_alpha_to_coverage_tests --dithered8

The 406-case sweep, the RGBA32F target and the sample-locations-off run need more env-gated switches on top of this patch: a --sweep mode and an A2C_RGBA32F target switch in the test, and an A2C_NO_SL gate in ValidateSampleLocations in Pipeline.cpp. They aren't needed to reproduce the pass and fail results above.

@github-actions github-actions Bot added build shader core/shader docs agc libSceAgc* labels Oct 12, 2026
@Amoenus

Amoenus commented Oct 12, 2026 •

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Current maintenance: published head365850f33, main872, dither25 after canonical24. Earlier review corrections are retained. The description and #4768 maintain fresh tests and the same-build current-main AMD controls, including remaining limits. Main2582 merge preview is clean but unbuilt. Historical evidence keeps its original pins.

Historical main075 validation: 0bcf45842 on main 075169f7b. Format 22 retains canonical 21/20; independently emitted goldens from exact main-4bb (20) and main-075 (21) cover the compact compatibility loop. All three broken parser gates fail as expected; build/libraries/checkers, reviewed undithered and restored sparse controls pass. Full NVIDIA: 1054 passed / 0 failed / 8 skipped of 1062, maximum 24.0818 s; all 15 selected groups pass five repeats in both modes. Existing AMD undithered-on/wave32-off failures reproduce with matched main and restored candidate (#4768); main has no dithered fixture. BDA device/span/interlock each pass five serial repetitions with matched main and restored candidate (#3291). #4556/title prerequisites remain declared. Main-77's earlier 1046/0/8 of 1054 applies to head9ea before canonical 21, not this compatibility result. Older evidence below retains its pinned scope; no new title or full upstream-CI claim.

Previous head before review correction: 4b8c2a9e3, based on main 510a2188cf4ea505dd58b3d5fc80ae3af2680c38. Full Windows build/libraries and NVIDIA suite: 1015 passed, 0 failed, 8 skipped of 1023, maximum 22.336s. NVIDIA both GPL modes ×5 and AMD GPL-off ×5 pass; the three known AMD GPL-on failures persist. The PR description gives the exact fresh matrix and limitations. Historical results below retain their older head/base scope.

Serialization correction: merged #4031 establishes canonical19 with pixel rasterPrimitive. This rebase writes20 for the added alpha bool and retains the primitive in serialization and draw/shader keys. Eight original-main19 fixtures (four primitives × subgroup off/on) preserve all checked fields and identity; versions16/17/18 remain covered. Shader-memory and pixel-ancillary pass ×20; a deliberate >=19 alpha-reader gate fails, followed by exact source restoration/full rebuild and ×5 passing controls. The existing #3763 coordination comment is updated: its proposed vertex-field layout must coordinate with canonical19/our20. Combined-head compatibility is untested.

GitHub status after push: head4b8c2a9e3 merges cleanly into preview main 22c30bed2b28d1a1ede116310c0e225d9caf8c80. Automatic conventions/eligibility/report pass; full Linux/Windows jobs are skipped, so no upstream full-CI pass is claimed. The repository automation has now removed needs rebase; this head remains cleanly mergeable. Our earlier direct removal was denied (HTTP403, repository admin rights required).
Additional serialization overlap audit: #4082 head e1b7688b8 uses20 for tessellation min/max levels, whereas our4b8c2a9e3 uses20 for the pixel dither bool. Its descendants #4114 (6b15b72ec), #4163 (f4aa18dc2) and #4172 (bad28357b) write21; #4201 (6c1945771) and #4222 (3f165b6db) write22, retaining that tessellation20 layout. These are source audits of the stated heads, not combined deserialization/build tests. #4082's description already acknowledges that whichever lands second must renumber. The review requests moving clamps out of the request, which would remove that particular format extension if implemented. Current heads still carry it. We will preserve whichever layout becomes canonical on main, version our added field afterwards and retain fixtures from the canonical serializer. No speculative code dependency or combined-compatibility claim.

Rebase and fresh-build validation (2026-10-13): 3040cd741, based on main 2f4cc8983. Request version 19 preserves canonical merged #4470 version 18; fixtures emitted by the original serializer cover subgroup support off/on, alongside versions 16/17. A malformed-reader control fails the compatibility tests. Full Windows build, conventions and test registration pass. After recompiling the driver/compiler and all native targets from unchanged tracked source, the full NVIDIA suite passes 990 tests, 0 failures, 7 skips of 997; maximum observed test time 20.849 seconds.

Correction to the earlier GPL matrix: APS5_NO_GPL checks presence, so 0 disables GPL too. Correct GPL-on testing leaves it unset; off sets 1. The earlier 0/1 campaigns exercised the off path twice. In the fresh corrected campaign, NVIDIA passes all ten selected groups five times in each mode; AMD passes those groups five times with GPL off, but GPL on fails these three on their first execution:

  • agc_driver_dithered_alpha_to_coverage: alpha zero resolves to 0 instead of preserved background 0.249023438 at pixel (0,0).
  • agc_driver_alpha_to_coverage: alpha zero leaves half 0x0000 instead of 0.5 in the scissor.
  • agc_driver_wave32_subgroup: thread 0 retains 0xdeadbeef instead of expected lane value 0.

The other seven AMD groups pass five times. Repeating the three failing groups with GPL on plus the existing APS5_NO_PIPELINE_LTO=1 diagnostic still fails each on its first execution, with the same signatures. Recorder-based helper controls independently choose NVIDIA and do not establish AMD coverage. Failed logs and the earlier runtime are retained; no production workaround or source fix has been added.

For reproduction on Windows AMD 1002:13c0 / driver 32.0.21036.18, Release WinLibs GCC 15.2.0 r7, set ANYPS5_GPU=AMD Radeon, ANYPS5_REQUIRE_VULKAN=1, ANYPS5_NO_SHADER_CACHE=1; leave APS5_NO_GPL absent. Run:

ctest --test-dir <build> --verbose --parallel 1 --repeat until-fail:5 --timeout 30 -R "^agc_driver_(dithered_alpha_to_coverage|alpha_to_coverage|wave32_subgroup)$"

Stronger same-build control: main 2f4cc8983 production, headers and both existing fixtures were rebuilt in this same build directory after reverting all core changes except CMake test additions. The stock-main and restored-candidate executables each fail undithered coverage and wave32 five times with AMD GPL on (also with pipeline LTO off), and pass five times with GPL off. NVIDIA passes all three modes. This reproduces the pattern without the alpha production change.

Executable placement control: copying byte-identical candidate executables to an empty directory, while keeping the original runtime libraries via PATH and the same current directory, reverses that AMD pattern for all three groups: GPL on passes 5/5 each; off fails 5/5 each. Copied libraries give the same result. The copied stock-main executables also invert the pattern in single-run controls. Executable and runtime SHA-256 identities were verified; GDB confirms intended library loading and different executable ASLR addresses, but the cause is unknown. The earlier different-runtime control cannot isolate the alpha change. Issue #4768 contains the matrix, reproduction and limits. A later unchanged-main 5f01c8082 selected build passes the existing undithered, wave32 and packed-tail groups with AMD GPL on and fails them off in both executable locations; it does not reproduce the location inversion. That is a different build/revision, not an alpha-head retest or a cause bisect. AMD validation remains unresolved; no alpha-specific regression is established. No new game/console/Linux validation or production workaround is claimed.

The independent Linux measurements retain their original head 5a101c505 scope and provenance. #4470 is merged; Depends on: none. The #423/#4031 incompatible version 18 layout findings remain a source audit, not combined-head validation. Current-main merge preview (5f01c8082) is clean, distinct from the pinned test base. Automatic full Linux/Windows build jobs were skipped; local results are not a full upstream CI pass. AI-assisted: Codex.

@github-actions github-actions Bot added the needs rebase Conflicts with main, rebase needed label Oct 12, 2026
@Amoenus
Amoenus force-pushed the codex/feat-alpha-to-coverage-dither8 branch from 4edc8d3 to 7894d81 Compare October 12, 2026 19:17
@github-actions github-actions Bot removed the needs rebase Conflicts with main, rebase needed label Oct 12, 2026
@Amoenus
Amoenus force-pushed the codex/feat-alpha-to-coverage-dither8 branch from 7894d81 to 3040cd7 Compare October 12, 2026 19:50
@Amoenus
Amoenus force-pushed the codex/feat-alpha-to-coverage-dither8 branch from 3040cd7 to ffd987b Compare October 12, 2026 23:11
@github-actions github-actions Bot added the needs rebase Conflicts with main, rebase needed label Oct 13, 2026
@Amoenus
Amoenus force-pushed the codex/feat-alpha-to-coverage-dither8 branch from ffd987b to 4b8c2a9 Compare October 13, 2026 01:31
@github-actions github-actions Bot removed the needs rebase Conflicts with main, rebase needed label Oct 13, 2026

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Thanks for the work and for addressing the earlier review points. This can't land as it is:

  • The head conflicts with main (core/libs/prx/libSceAgcDriver/tests/ShaderMemory.cpp), and the description says the current head is not the one you intend to push ("still needs adaptation and validation before its next push").
  • It bumps the request serialization version to 22 (RequestSerializer.cpp, reader gate version >= 22u), which collides with #5097 (canonical format 22) and #5137 (version 21 layouts). Both are still open. As you noted, the dither field has to move to version 23 on top of them.

Please push the adapted head once #5097 and #5137 are merged: dither field at version 23, retained 16–22 compatibility fixtures regenerated from the then-current serializer, and the PR's tests rerun on the rebased tree. The semantics themselves (mask table matching gfx1036, covered by the independent RADV/RTX 3090 run) look fine; I haven't re-measured them.

@Amoenus

Amoenus commented Oct 13, 2026 •

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@adriadam10 Rebased to 246d16a03, based on main4f. Merged #5521's undithered targetless32_AR handling is preserved; dithered32_AR remains explicitly refused and has a rejection control. Canonical24 tessellation fields remain intact; dither uses25.

Full build/libs/checkers pass. Three compatibility/state controls pass20 repetitions; all13 NVIDIA groups pass five times in both GPL modes, no skips, maximum5.44858s. AMD still fails standard/dithered coverage GPL-on and the BDA/wave32 trio GPL-off. The earlier matched-main872 comparison retains its pin; no fresh unmodified-main4f exclusion is claimed. Exact matrix and limits are in the updated description and #4768. Later main23e merge preview is clean but unbuilt. No fresh title/full-suite/console claim. AI-assisted: Codex.

@blawesom

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Rebase handoff — rebased onto current main (all 16 commits apply cleanly now — the earlier conflicts were against older main), authorship unchanged.

Verified on Linux (CachyOS, kernel 7.2.9, GCC 16.2.1, Ninja, Release, BUILD_TESTING=ON, AMD RX 9070 XT / RADV):

To pick it up:

git fetch https://github.com/blawesom/AnyPS5 rebase/4451
git checkout <your branch>
git merge --ff-only FETCH_HEAD

Head is 42fbffd37.

@github-actions github-actions Bot added the needs rebase Conflicts with main, rebase needed label Oct 14, 2026
@Amoenus
Amoenus force-pushed the codex/feat-alpha-to-coverage-dither8 branch from b551a73 to 365850f Compare October 14, 2026 08:54
@github-actions github-actions Bot removed the needs rebase Conflicts with main, rebase needed label Oct 14, 2026
@Amoenus

Amoenus commented Oct 14, 2026

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@blawesom I checked your handoff: all14 of our topic patches are range-equivalent in your rebase. Main has since introduced canonical request24 for tessellation, so the PR is now 365850f33 with dither25 and independent main24 compatibility fixtures. The earlier review corrections remain intact.

Fresh Windows build/compatibility/NVIDIA checks pass; existing AMD failures reproduce with current main in the same build directory. Your Linux result remains scoped to42fbffd37. The updated description has the exact matrix and remaining limits. AI-assisted: Codex.

@github-actions github-actions Bot added the needs rebase Conflicts with main, rebase needed label Oct 14, 2026
@Amoenus
Amoenus force-pushed the codex/feat-alpha-to-coverage-dither8 branch from 365850f to 246d16a Compare October 14, 2026 10:26
@github-actions github-actions Bot removed the needs rebase Conflicts with main, rebase needed label Oct 14, 2026
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Other open pull requests touch the same code. Merging one will break the other, or both implement the same thing. If this one builds on them, list them in Depends on.

Pull request Conflicting files (lines on main) Same exports Same new files
#757 core/libs/prx/libSceAgcDriver/tests/Graphics.cpp L5896
#758 core/libs/prx/libSceAgcDriver/tests/Graphics.cpp L5896
#4706 core/libs/prx/libSceAgcDriver/tests/ShaderMemory.cpp L1944-1945, L1951, L2069
#4783 core/libs/prx/libSceAgcDriver/tests/Graphics.cpp L5891
#4820 core/libs/prx/libSceAgcDriver/CMakeLists.txt L1231
#5200 core/libs/prx/libSceAgcDriver/Execution/src/Driver/Draw/DrawRegisterKey.cpp L142
core/libs/prx/libSceAgcDriver/tests/ShaderMemory.cpp L1854, L1898, L1922, L1948-1949, L2067-2069, L2071-2074
core/shader/recompiler/ControlFlow/src/RequestSerializer.cpp L340, L391
core/shader/recompiler/Recompiler.hpp L154
#5314 core/libs/prx/libSceAgcDriver/tests/ShaderMemory.cpp L1948-1949, L2069
core/shader/recompiler/ControlFlow/src/RequestSerializer.cpp L340, L391
#5445 core/libs/prx/libSceAgcDriver/CMakeLists.txt L1231
#5500 core/libs/prx/libSceAgcDriver/Execution/src/Driver/Draw/DrawDecode.cpp L119
core/libs/prx/libSceAgcDriver/Execution/src/Driver/Draw/DrawRegisterKey.cpp L142
core/libs/prx/libSceAgcDriver/tests/ShaderMemory.cpp L1942, L1944-1946, L1948-1949, L2069, L2071-2073
core/shader/recompiler/ControlFlow/src/RequestSerializer.cpp L340, L391
core/shader/recompiler/Recompiler.hpp L154
#5673 core/libs/prx/libSceAgcDriver/Graphics/include/State.hpp L116

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Checked on current main (merged locally): the new agc_driver_undithered_alpha_to_coverage_state, agc_driver_alpha_to_coverage_state and agc_driver_dithered_alpha_to_coverage (lavapipe), agc_driver_graphics, agc_shader_memory and request_serializer pass; they don't build without the change. The only failing test in libSceAgc/libSceAgcDriver is agc_driver_tessellation, which already fails on main. The mask table matches the independent gfx1036/RADV and RTX 3090 measurements by @simonbbby, the undithered path is unchanged, and the debt entry keeps its link. Dither on gfx1013 and on a real title is not measured; merging once the full Build is green.

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5 participants