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perf(agc): a DMA_DATA prefetch keeps the draw pipeline - #6538
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A DMA_DATA whose destination is nowhere writes no memory, so the draws ahead of it have nothing to order against. RADV issues one per draw, and each drained the pipeline and idled the queue worker until the committer caught up. Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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What
With pipelined draws, every packet that is not known to be safe drains the draw pipeline before it runs.
DMA_DATAwith its destination set to nowhere (DST_SEL 2) is a cache prefetch: it writes no memory, so there is nothing for the draws ahead of it to order against. RADV issues one per draw for its descriptor and push-constant rings (about 12,000 a second in a PS2 title under RetroArch's PCSX2 core, every one a drain), and each drain idles the queue worker until the committer catches up.keepsDrawPipelinekeeps the pipeline for aDMA_DATAwhose destination is nowhere. Copies, fills and GDS transfers drain as before.DrawPipeline::Drains(reason)reads a drain count under the pipeline's lock, for the test.Overlaps with #6208, which pipelines every
DMA_DATAand covers this case among others; that PR is being reworked, and this one is the one-line subset that needs no snapshotting, with its own test and numbers. If #6208 lands first this PR is void.Tested
Windows 11, NVIDIA GeForce RTX 5070 Ti, MinGW-w64 GCC 15.2.0, on main
92e50418f.ctest: 1276 of 1295 pass, 14 skipped.guest_call_trace_abortandwindows_backtrace_reportfail, and fail the same way on plain main here;agc_driver_prepared_graphics_prebuild_0/_1andundeliverable_host_exceptionfail under my test runner because it skips their environment changes and pass pattern, and pass run with those.agc_driver_pipelined_prefetch: a commit holds the draw pipeline busy, and aDMA_DATAis submitted with a label write behind it. For a prefetch the queue worker passes it and the label queues behind the held commit, with no packet drain; for a copy the worker is held in the copy's drain until the commit is released, one drain, and the copy's bytes land. Without the change the prefetch case fails the same way the copy case passes: the worker is held.[draw] pipelinedline's packet drains per 10 s from about 120,000 (all opcode 0x50) to under 1,000 (none 0x50). The lighter scenes reach real time.Checklist
main; no other open PR implements the same functions (perf(agc): pipeline DMA_DATA when APS5_PIPELINE_DMA=1 #6208 overlaps, see above)NotImplemented_nid_no_patch); silent stubs are listed in TechnicalDebt.mdfiles or images added to the repository (attach them to this PR)🤖 Generated with Claude Code