Repository navigation
fix(agc): start DB_Z_INFO and DB_STENCIL_INFO at their clear-state value - #7659
Conversation
github-actions
Bot
added
the
unblocks title
|
Other open pull requests touch the same code. Merging one will break the other, or both implement the same thing. If this one builds on them, list them in Depends on.
Some comparisons could not be completed because a pull request conflicts with the base branch. Review these shared files manually before concluding that there is no overlap.
|
|
Tested on Windows 11 (RTX 5070 Ti and AMD RDNA2 iGPU) and on Linux (gcc 13.3), base
One side effect the description doesn't list, from reading the code rather than a run: AI-assisted: yes (Claude Code); results above were run on this machine. |
|
Tested on NVIDIA: GeForce RTX 4090, driver 617.42, Windows 11 Pro 26200, WinLibs GCC 15.2.0 r7, Release,
Not tested: the title. AI-assisted: yes (Claude Code) |
|
Intel and AMD Windows data: Windows 11 Pro 26300, WinLibs GCC 15.2.0 r7, Release, every execution test built,
I also ran full CTest with this PR and the 13 other open AGC and shader PRs I tested in the same batch merged together (#7668, #7504, #7432, #7426, #7413, #7480, #7465, #7466, #7464, #7449, #7489, #7673, #7560). Neither GPU showed a failure beyond AI-assisted: yes (Claude Code) |
|
@wachi35676 thanks for the runs and the source check. You're right about |
05b1428 to
b30f616
Compare
8ef2cd5 to
51c1690
Compare
A context that never wrote DB_Z_INFO or DB_STENCIL_INFO had neither register, so a draw testing depth or stencil without a depth target was refused (PPSA24040, DB_DEPTH_CONTROL 0x777), and a depth or stencil plane whose other register was never written stopped on a missing register. Both now start at 0, FORMAT INVALID, initially and after CLEAR_STATE. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
51c1690 to
9ab433f
Compare
|
Checked the |
What
METAL GEAR SOLID: MASTER COLLECTION Vol.2 BONUS CONTENT (PPSA24040) stops 4.25 s after launch on unmodified
main(#7621):Its draw enables the depth and stencil tests (
DB_DEPTH_CONTROL0x777: Z and stencil on, Z writes on, both functions ALWAYS) in a context that never wroteDB_Z_INFOorDB_STENCIL_INFO(context0x010and0x011). Those two registers were not in the initial context, sodepthSurfaceBound,planeTestsanddepthPlanesAbsentsaw neither a bound plane nor an absent one, and bothDecodeStateand the draw precheck refused the draw.The two registers now start at 0, both initially and after
CLEAR_STATE, the way #4949, #2128 and #5347 added other registers a title may leave unwritten. 0 isFORMATINVALID in both, so an unwritten pair now decodes like a pair written as INVALID: the tests pass and nothing is written (the path from 48ebf31 and 77373c0). The draw precheck already read the two registers as 0 when they were missing (DrawPrecheck.cpp), so it now agrees withDecodeState.The value:
clearstate_gfx10.h(gfx10_SECT_CONTEXT_def_1from0xa000):DB_Z_INFOandDB_STENCIL_INFOare 0.gc_10_3_0_default.h:mmDB_Z_INFO_DEFAULTandmmDB_STENCIL_INFO_DEFAULTare 0.RegisterDefaultsData.hpp, the context table of V0, V4, V5 and V7-V11) write0x80000180and0x20000180. Those are also INVALID formats, with a swizzle mode,ZRANGE_PRECISIONandTILE_STENCIL_DISABLEset. Of these other bits, onlyTILE_STENCIL_DISABLEchanges a result in the driver: the HTILE layout of a multisampled depth plane whoseDB_STENCIL_INFOwas never written. A debt entry records the difference and that the console's reset values are not measured.The same gap stopped two more cases, now covered by the test: a depth plane in a context that never wrote
DB_STENCIL_INFO, and a stencil plane in a context that never wroteDB_Z_INFO.decodeDepthread the unwritten register and threwAGC graphics: missing register in context bank at DWORD 0x11 (17)and... DWORD 0x10 (16). They now decode as a depth-only and a stencil-only target.Two more effects of the unwritten pair now reading as absent planes:
with depth or stencil workbecause of a setDB_DEPTH_CONTROL, as it already did not when both planes are written as INVALID (d9fbaf7).DB_Z_INFOused to stop withmissing register ... DWORD 0x11and now stops withstencil clear requires a writable stencil plane. Both are refusals.DB_RENDER_CONTROL0x10, a passing depth test, no color writes) on a depth plane whoseDB_STENCIL_INFOwas never written now draws nothing, as it already did when that register is written INVALID (fix(agc): handle Demon's Souls read-only depth resummarize #4049). It used to refuse withDB_RENDER_CONTROL depth copy, resummarize or decompress. (Found by @wachi35676.)Tested
Windows 11 26200, AMD Radeon RX 6700 XT (gfx1031), driver 32.0.21045.5002, WinLibs GCC 15.2.0 r7, Release,
BUILD_TESTING=ON,ANYPS5_REQUIRE_VULKAN=1.agc_driver_graphics, newUnwrittenDepthPlaneTests. A fresh queue (initial context) gets the draw registers ofmakeState()on top, and never writesDB_Z_INFOorDB_STENCIL_INFO:DB_DEPTH_CONTROL0x777decodes with no depth target and no depth or stencil test or write, and the precheck accepts it;0x77f);DB_STENCIL_INFOdecodes as a 32x2 depth-only target;DB_Z_INFOkeeps its stencil test and drops the depth test;CLEAR_STATE(ClearContext) resets both registers to 0.agc_driver_pm4: theCLEAR_STATEpacket check from fix(agc): initialize stencil control and reference masks #5347 now also writes0x010and0x011first and requires 0 after.main505767380(this change without theQueueState.hppline):agc_driver_graphicsfails with the title's message,depth, stencil or conditional color writes is unsupported (register 0x200 = 0x00000777), andagc_driver_pm4withregister is not set. Run case by case on that build, the precheck refuses0x777and0x77fwith the same message, andDecodeStatethrowsmissing register in context bank at DWORD 0x11 (17)for the depth plane and... DWORD 0x10 (16)for the stencil plane.505767380and after rebasing ontomain48d61f53b.ctest --parallel 4 --timeout 120on this change rebased ontomain48d61f53b: 1513 tests, 5 fail, the same 5 as on unchangedmain505767380on this machine:agc_driver_lds_mixed_width_atomics(fix(shader): release the LDS lock with an exchange and drop fences inside it #6976),agc_driver_lds_lock_budget(AGC: AMD device-backed LDS lock-budget case returns half of expected sum #7344),agc_driver_layered_volume_vertex_no_gpl(AMD Windows: alpha-to-coverage still fails at the original executable path after #6436 #4768), andlog_macrosandlog_macros_timestamps, which fail only in this local build because ccache's base directory turns__FILE__into a relative path with backslashes.maind0852defa. fix(agc): reread an invalid indirect register list where its packet executes #7683's newtestInvalidRegisterListEntrieschecks that a rejected register list leaves0x10and0x11unwritten by testing that they are absent from a freshQueueState. With this change, both start present at their clear-state value 0. The check now compares the whole context with its initial state, which still catches any partial write.agc_driver_graphicsandagc_driver_pm4pass 2 of 2 on the rebased head.main47fa6eecf(head9ab433f25). The only conflicts were next to this change:mainaddedsampleOrderTests()beside this PR'sUnwrittenDepthPlaneTests()call intests/Graphics.cpp, and the Multisampled DCC comp-to-single clears entry beside this PR's debt entry; both are kept.agc_driver_graphicsandagc_driver_pm4pass 2 of 2 on the rebased head (same machine).VK_INSTANCE_LAYERS=VK_LAYER_KHRONOS_validation,ANYPS5_NO_SHADER_CACHE=1,ANYPS5_REQUIRE_VULKAN=1,ctest -V, same RX 6700 XT. The 22 depth and stencil execution tests (ctest -R "^agc_driver_(depth|stencil)_"), which record depth/stencil draws on a Vulkan device, pass onmaind0852defaand on this head. Neither log reportswas not found but was requestedor anyVUID-error.python tools/check_conventions.py --base origin/mainwith this title and body passes.mainaff1f7190: PPSA24040 v01.200.001 now logsalways-pass depth/stencil state is rendered without a depth target (DB_DEPTH_CONTROL=0x00000777)and shows its main menu and bonus-content selection at about 60 FPS. Audio and save reload work, and a 468 s run ended normally with no new stop.Checklist
main; no other open PR implements the same functionsNotImplemented_nid_no_patch); silent stubs are listed under Silent stubs in their library's technical debt file.mdfiles or images added to the repository (attach them to this PR)🤖 Generated with Claude Code