Skip to content

Conversation

bspguy
Copy link
Owner

@bspguy bspguy commented Nov 7, 2023

PR Description

Bring-up for Xilinx ZCU102 with the EVAL-AD7616SDZ, connected via SDP-I-FMC to FMC1 connector.

PR Type

  • Bug fix (change that fixes an issue)
  • New feature (change that adds new functionality)
  • Breaking change (has dependencies in other repos or will cause CI to fail)

PR Checklist

  • I have followed the code style guidelines
  • I have performed a self-review of changes
  • I have compiled all hdl projects and libraries affected by this PR
  • I have tested in hardware affected projects, at least on relevant boards
  • I have commented my code, at least hard-to-understand parts
  • I have signed off all commits from this PR
  • I have updated the documentation (wiki pages, ReadMe files, Copyright etc)
  • I have not introduced new Warnings/Critical Warnings on compilation
  • I have added new hdl testbenches or updated existing ones

bspguy and others added 2 commits November 6, 2023 18:11
Fixed system_project.tcl with ad7616_sdz_zcu102 naming.
Removed .txt from .gitignore and added serial + parallel fmc templates
from the Zedboard.
Updated fmc pinout templates and ad7616_bd.tcl to match the zcu102.
Updated xdc files according to FMC1 connector.

Signed-off-by: Chuck U. Farley <[email protected]>
Revert memory interconnection change that would break other carriers.
Add licenses for consistency.

Signed-off-by: Jorge Marques <[email protected]>
@bspguy bspguy requested a review from gastmaier November 7, 2023 08:36
@bspguy bspguy self-assigned this Nov 7, 2023
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

2 participants