[DWARF] Add logging to range building

cranelift/codegen/src/isa/aarch64/mod.rs

@@ -15,6 +15,7 @@ use crate::settings as shared_settings;
 use alloc::{boxed::Box, vec::Vec};
 use core::fmt;
 use cranelift_control::ControlPlane;
+use std::string::String;
 use target_lexicon::{Aarch64Architecture, Architecture, OperatingSystem, Triple};
 
 // New backend:
@@ -214,6 +215,10 @@ impl TargetIsa for AArch64Backend {
         Ok(cs)
     }
 
+    fn pretty_print_reg(&self, reg: Reg, _size: u8) -> String {
+        inst::regs::pretty_print_reg(reg)
+    }
+
     fn has_native_fma(&self) -> bool {
         true
     }

cranelift/codegen/src/isa/mod.rs

@@ -46,7 +46,6 @@
 use crate::dominator_tree::DominatorTree;
 pub use crate::isa::call_conv::CallConv;
 
-use crate::flowgraph;
 use crate::ir::{self, Function, Type};
 #[cfg(feature = "unwind")]
 use crate::isa::unwind::{systemv::RegisterMappingError, UnwindInfoKind};
@@ -55,10 +54,12 @@ use crate::settings;
 use crate::settings::Configurable;
 use crate::settings::SetResult;
 use crate::CodegenResult;
+use crate::{flowgraph, Reg};
 use alloc::{boxed::Box, sync::Arc, vec::Vec};
 use core::fmt;
 use core::fmt::{Debug, Formatter};
 use cranelift_control::ControlPlane;
+use std::string::String;
 use target_lexicon::{triple, Architecture, PointerWidth, Triple};
 
 // This module is made public here for benchmarking purposes. No guarantees are
@@ -373,6 +374,10 @@ pub trait TargetIsa: fmt::Display + Send + Sync {
         Err(capstone::Error::UnsupportedArch)
     }
 
+    /// Return the string representation of "reg" accessed as "size" bytes.
+    /// The returned string will match the usual disassemly view of "reg".
+    fn pretty_print_reg(&self, reg: Reg, size: u8) -> String;
+
     /// Returns whether this ISA has a native fused-multiply-and-add instruction
     /// for floats.
     ///

cranelift/codegen/src/isa/pulley_shared/mod.rs

@@ -21,6 +21,7 @@ use alloc::vec::Vec;
 use core::fmt::Debug;
 use core::marker::PhantomData;
 use cranelift_control::ControlPlane;
+use std::string::String;
 use target_lexicon::{Architecture, Triple};
 
 pub use settings::Flags as PulleyFlags;
@@ -215,6 +216,10 @@ where
         inst::InstAndKind::<P>::function_alignment()
     }
 
+    fn pretty_print_reg(&self, reg: crate::Reg, _size: u8) -> String {
+        format!("{reg:?}")
+    }
+
     fn has_native_fma(&self) -> bool {
         false
     }

cranelift/codegen/src/isa/riscv64/mod.rs

@@ -14,6 +14,7 @@ use crate::{ir, CodegenError};
 use alloc::{boxed::Box, vec::Vec};
 use core::fmt;
 use cranelift_control::ControlPlane;
+use std::string::String;
 use target_lexicon::{Architecture, Triple};
 mod abi;
 pub(crate) mod inst;
@@ -191,6 +192,11 @@ impl TargetIsa for Riscv64Backend {
         Ok(cs)
     }
 
+    fn pretty_print_reg(&self, reg: Reg, _size: u8) -> String {
+        // TODO-RISC-V: implement proper register pretty-printing.
+        format!("{reg:?}")
+    }
+
     fn has_native_fma(&self) -> bool {
         true
     }

cranelift/codegen/src/isa/s390x/mod.rs

@@ -15,6 +15,7 @@ use crate::settings as shared_settings;
 use alloc::{boxed::Box, vec::Vec};
 use core::fmt;
 use cranelift_control::ControlPlane;
+use std::string::String;
 use target_lexicon::{Architecture, Triple};
 
 // New backend:
@@ -174,6 +175,10 @@ impl TargetIsa for S390xBackend {
         Ok(cs)
     }
 
+    fn pretty_print_reg(&self, reg: Reg, _size: u8) -> String {
+        inst::regs::pretty_print_reg(reg)
+    }
+
     fn has_native_fma(&self) -> bool {
         true
     }

cranelift/codegen/src/isa/x64/mod.rs

@@ -19,6 +19,7 @@ use crate::{Final, MachBufferFinalized};
 use alloc::{boxed::Box, vec::Vec};
 use core::fmt;
 use cranelift_control::ControlPlane;
+use std::string::String;
 use target_lexicon::Triple;
 
 mod abi;
@@ -158,6 +159,10 @@ impl TargetIsa for X64Backend {
             .build()
     }
 
+    fn pretty_print_reg(&self, reg: Reg, size: u8) -> String {
+        inst::regs::pretty_print_reg(reg, size)
+    }
+
     fn has_native_fma(&self) -> bool {
         self.x64_flags.use_fma()
     }

crates/cranelift/src/debug/transform/debug_transform_logging.rs

@@ -1,10 +1,17 @@
-use crate::debug::Reader;
+use crate::{debug::Reader, translate::get_vmctx_value_label};
 use core::fmt;
+use cranelift_codegen::{ir::ValueLabel, isa::TargetIsa, LabelValueLoc, ValueLabelsRanges};
 use gimli::{
     write, AttributeValue, DebuggingInformationEntry, Dwarf, LittleEndian, Unit, UnitOffset,
     UnitSectionOffset,
 };
 
+macro_rules! dbi_log_enabled {
+    () => {
+        cfg!(any(feature = "trace-log", debug_assertions))
+            && ::log::log_enabled!(target: "debug-info-transform", ::log::Level::Trace)
+    };
+}
 macro_rules! dbi_log {
     ($($tt:tt)*) => {
         if cfg!(any(feature = "trace-log", debug_assertions)) {
@@ -13,6 +20,7 @@ macro_rules! dbi_log {
     };
 }
 pub(crate) use dbi_log;
+pub(crate) use dbi_log_enabled;
 
 pub struct CompileUnitSummary<'a> {
     unit: &'a Unit<Reader<'a>, usize>,
@@ -274,3 +282,79 @@ fn get_offset_value(offset: UnitSectionOffset) -> usize {
         UnitSectionOffset::DebugTypesOffset(offs) => offs.0,
     }
 }
+
+pub fn log_get_value_name(value: ValueLabel) -> ValueNameSummary {
+    ValueNameSummary { value }
+}
+
+pub struct ValueNameSummary {
+    value: ValueLabel,
+}
+
+impl fmt::Debug for ValueNameSummary {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        if self.value == get_vmctx_value_label() {
+            f.pad("VMCTX")
+        } else {
+            f.pad(&format!("L#{}", self.value.as_u32()))
+        }
+    }
+}
+
+pub fn log_get_value_loc(loc: LabelValueLoc, isa: &dyn TargetIsa) -> ValueLocSummary {
+    ValueLocSummary { loc, isa }
+}
+
+pub struct ValueLocSummary<'a> {
+    loc: LabelValueLoc,
+    isa: &'a dyn TargetIsa,
+}
+
+impl<'a> fmt::Debug for ValueLocSummary<'a> {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        if let LabelValueLoc::Reg(reg) = self.loc {
+            let reg_name = self.isa.pretty_print_reg(reg, self.isa.pointer_bytes());
+            return write!(f, "{reg_name}");
+        }
+
+        write!(f, "{:?}", self.loc)
+    }
+}
+
+pub fn log_get_value_ranges<'a>(
+    ranges: Option<&'a ValueLabelsRanges>,
+    isa: &'a dyn TargetIsa,
+) -> ValueRangesSummary<'a> {
+    ValueRangesSummary { ranges, isa }
+}
+
+pub struct ValueRangesSummary<'a> {
+    ranges: Option<&'a ValueLabelsRanges>,
+    isa: &'a dyn TargetIsa,
+}
+
+impl<'a> fmt::Debug for ValueRangesSummary<'a> {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        if let Some(ranges) = self.ranges {
+            // Sort the output first for nicer display.
+            let mut locals = Vec::new();
+            for value in ranges {
+                locals.push(*value.0);
+            }
+            locals.sort_by_key(|n| n.as_u32());
+
+            for i in 0..locals.len() {
+                let name = locals[i];
+                write!(f, "{:<6?}:", log_get_value_name(name))?;
+                for range in ranges.get(&name).unwrap() {
+                    write!(f, " {:?}", log_get_value_loc(range.loc, self.isa))?;
+                    write!(f, "@[{}..{})", range.start, range.end)?;
+                }
+                if i != locals.len() - 1 {
+                    writeln!(f)?;
+                }
+            }
+        }
+        Ok(())
+    }
+}