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Update: convert paged attention example from float16 to bfloat16 - #4

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paged-attention-bf16
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Update: convert paged attention example from float16 to bfloat16#4
chenshengxin2026 wants to merge 2 commits into
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paged-attention-bf16

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Summary

  • Change dtype from float16 to bfloat16 in all golden test cases
  • Update QK matmul, PV matmul kernels to use bfloat16_t types
  • Update softmax_prepare to convert via bfloat16 instead of float16
  • Rename orchestration variables from pij_f16 to pij_bf16

Testing

  • Simulation tests pass (a2a3sim, Case1: 256/256 elements matched)
  • Hardware tests pass (no idle devices available)

…forms (hw-native-sys#472)

a2a3 and a5 use the same toolchain and differ only at runtime, so
build_runtimes.py now always builds both when the onboard cross-compiler
is available. Removes _detect_local_chip_arch() and the PTO_ARCH
environment variable workaround.

ci.py: -p is now optional — omitting it auto-discovers and runs all sim
platforms. Docs updated to reflect ci.py replacing ci.sh.

Co-authored-by: Chao Wang <26245345+ChaoWao@users.noreply.github.com>
@chenshengxin2026
chenshengxin2026 force-pushed the paged-attention-bf16 branch 2 times, most recently from 3d15637 to dfc0994 Compare April 8, 2026 06:25
- Pin pto-isa to 8830244b for BF16 CPU-sim support (TMATMUL, TCVT, etc.)
- Convert a2a3 paged_attention example from float16 to bfloat16 as validation
- Fix a5 bgemm deadlock: add TASSIGN for vecFifoTile (required by new
  NPUMemoryModel at 8830244b)
- Fix CI: add ubuntu-toolchain-r/test PPA so ubuntu sim jobs install
  g++-15 instead of falling back to g++-13 (broken bfloat16 on x86_64)
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