Initial commit of nRF9151 board definition

boards/circuitdojo/feather_nrf9151/CMakeLists.txt

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+# Copyright (c) 2024 Circuit Dojo
+# SPDX-License-Identifier: Apache-2.0
+
+zephyr_library()
+zephyr_library_sources_ifdef(CONFIG_CIRCUITDOJO_FEATHER_NRF9151_PMIC_STARTUP startup.c)
+
+if (CONFIG_CIRCUITDOJO_FEATHER_NRF9151_STATIC_PARTITIONS_FACTORY)
+set(PM_STATIC_YML_FILE ${CMAKE_CURRENT_LIST_DIR}/circuitdojo_feather_nrf9151_pm_static.yml CACHE INTERNAL "")
+endif()

boards/circuitdojo/feather_nrf9151/Kconfig

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+config CIRCUITDOJO_FEATHER_NRF9151_STATIC_PARTITIONS_FACTORY
+    bool "Use the static parition defintitions to stay compatible with bootloader"
+    default y
+
+if !MCUBOOT
+config CIRCUITDOJO_FEATHER_NRF9151_PMIC_STARTUP
+	bool "Allows for executing startup code for PMIC."
+	default y
+endif

boards/circuitdojo/feather_nrf9151/Kconfig.circuitdojo_feather_nrf9151

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+# Copyright (c) 2020-2024 Circuit Dojo LLC
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_CIRCUITDOJO_FEATHER_NRF9151
+	select SOC_NRF9151_LACA

boards/circuitdojo/feather_nrf9151/Kconfig.defconfig

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+# Circuit Dojo nRF9151 Feather configuration
+
+# Copyright (c) 2018-2024 Nordic Semiconductor ASA
+# Copyright (c) 2020-2024 Circuit Dojo LLC
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_CIRCUITDOJO_FEATHER_NRF9151 || BOARD_CIRCUITDOJO_FEATHER_NRF9151_NS
+
+# For the secure version of the board the firmware is linked at the beginning
+# of the flash, or into the code-partition defined in DT if it is intended to
+# be loaded by MCUboot. If the secure firmware is to be combined with a non-
+# secure image (TRUSTED_EXECUTION_SECURE=y), the secure FW image shall always
+# be restricted to the size of its code partition.
+# For the non-secure version of the board, the firmware
+# must be linked into the code-partition (non-secure) defined in DT, regardless.
+# Apply this configuration below by setting the Kconfig symbols used by
+# the linker according to the information extracted from DT partitions.
+
+# Workaround for not being able to have commas in macro arguments
+DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition
+
+config FLASH_LOAD_SIZE
+	default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
+	depends on BOARD_CIRCUITDOJO_FEATHER_NRF9151 && TRUSTED_EXECUTION_SECURE
+
+if BOARD_CIRCUITDOJO_FEATHER_NRF9151_NS
+
+config FLASH_LOAD_OFFSET
+	default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
+
+config FLASH_LOAD_SIZE
+	default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
+
+endif # BOARD_CIRCUITDOJO_FEATHER_NRF9151_NS
+
+config BT_HCI_VS
+	default y if BT
+
+config BT_WAIT_NOP
+	default BT && $(dt_nodelabel_enabled,nrf5340_reset)
+
+endif # BOARD_CIRCUITDOJO_FEATHER_NRF9151 || BOARD_CIRCUITDOJO_FEATHER_NRF9151_NS

boards/circuitdojo/feather_nrf9151/board.cmake

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+# SPDX-License-Identifier: Apache-2.0
+
+if(CONFIG_BOARD_CIRCUITDOJO_FEATHER_NRF9151_NS)
+  set(TFM_PUBLIC_KEY_FORMAT "full")
+endif()
+
+if(CONFIG_TFM_FLASH_MERGED_BINARY)
+  set_property(TARGET runners_yaml_props_target PROPERTY hex_file tfm_merged.hex)
+endif()
+
+# TODO: change to nRF9151_xxAA when such device is available in JLink
+board_runner_args(jlink "--device=nRF9160_xxAA" "--speed=4000")
+board_runner_args(pyocd "--target=nRF9160_xxAA" "--frequency=4000000")
+# board_runner_args(probe-rs "--chip=nRF9160_xxAA" "--speed=10000")
+include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
+# include(${ZEPHYR_BASE}/boards/common/probe-rs.board.cmake)

boards/circuitdojo/feather_nrf9151/board.yml

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+board:
+  name: circuitdojo_feather_nrf9151
+  vendor: circuitdojo
+  socs:
+    - name: nrf9151
+      variants:
+        - name: ns
+  revision:
+    format: number
+    default: "1"
+    revisions:
+      - name: "1"

boards/circuitdojo/feather_nrf9151/circuitdojo_feather_nrf9151.dts

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+/*
+ * Copyright (c) 2018-2020 Nordic Semiconductor ASA
+ * Copyright (c) 2020-2024 Circuit Dojo LLC
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <nordic/nrf9151_laca.dtsi>
+#include "circuitdojo_feather_nrf9151_common.dtsi"
+
+/ {
+	chosen {
+		zephyr,sram = &sram0_s;
+		zephyr,flash = &flash0;
+		zephyr,code-partition = &slot0_partition;
+		zephyr,sram-secure-partition = &sram0_s;
+		zephyr,sram-non-secure-partition = &sram0_ns;
+	};
+};

boards/circuitdojo/feather_nrf9151/circuitdojo_feather_nrf9151.yaml

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+identifier: circuitdojo_feather_nrf9151
+name: CircuitDojo-Feather-nRF9151
+type: mcu
+arch: arm
+toolchain:
+  - gnuarmemb
+  - xtools
+  - zephyr
+ram: 88
+flash: 1024
+supported:
+  - i2c
+  - pwm
+  - watchdog
+  - counter

boards/circuitdojo/feather_nrf9151/circuitdojo_feather_nrf9151_common-pinctrl.dtsi

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+/*
+ * Copyright (c) 2022 Nordic Semiconductor
+ * Copyright (c) 2020-2024 Circuit Dojo LLC
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&pinctrl {
+	uart0_default: uart0_default {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 0, 11)>,
+					<NRF_PSEL(UART_RX, 0, 10)>;
+		};
+	};
+
+	uart0_sleep: uart0_sleep {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 0, 11)>,
+					<NRF_PSEL(UART_RX, 0, 10)>;
+			low-power-enable;
+		};
+	};
+
+	uart1_default: uart1_default {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 0, 24)>,
+					<NRF_PSEL(UART_RX, 0, 23)>;
+		};
+	};
+
+	uart1_sleep: uart1_sleep {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 0, 24)>,
+					<NRF_PSEL(UART_RX, 0, 23)>;
+			low-power-enable;
+		};
+	};
+
+	i2c2_default: i2c2_default {
+		group1 {
+			psels = <NRF_PSEL(TWIM_SDA, 0, 2)>,
+					<NRF_PSEL(TWIM_SCL, 0, 1)>;
+		};
+	};
+
+	i2c2_sleep: i2c2_sleep {
+		group1 {
+			psels = <NRF_PSEL(TWIM_SDA, 0, 2)>,
+					<NRF_PSEL(TWIM_SCL, 0, 1)>;
+			low-power-enable;
+		};
+	};
+
+	pwm0_default: pwm0_default {
+		group1 {
+			psels = <NRF_PSEL(PWM_OUT0, 0, 25)>;
+		};
+	};
+
+	pwm0_sleep: pwm0_sleep {
+		group1 {
+			psels = <NRF_PSEL(PWM_OUT0, 0, 25)>;
+			low-power-enable;
+		};
+	};
+
+	spi3_default: spi3_default {
+		group1 {
+			psels = <NRF_PSEL(SPIM_SCK, 0, 6)>,
+			        <NRF_PSEL(SPIM_MOSI, 0, 7)>,
+			        <NRF_PSEL(SPIM_MISO, 0, 5)>;
+		};
+	};
+
+	spi3_sleep: spi3_sleep {
+		group1 {
+			psels = <NRF_PSEL(SPIM_SCK, 0, 6)>,
+			        <NRF_PSEL(SPIM_MOSI, 0, 7)>,
+			        <NRF_PSEL(SPIM_MISO, 0, 5)>;
+			low-power-enable;
+		};
+	};
+
+};