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3 changes: 3 additions & 0 deletions .gitmodules
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[submodule "evaluation/asap7sc7p5t_28"]
path = evaluation/asic/asap7sc7p5t_28
url = https://github.com/The-OpenROAD-Project/asap7sc7p5t_28.git
2 changes: 2 additions & 0 deletions evaluation/asic/Dockerfile
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FROM centos:7
RUN yum -y install libXft tcsh libXScrnSaver libXi libXrandr libSM libpng12 libglvnd-glx libXcomposite pulseaudio-libs
36 changes: 36 additions & 0 deletions evaluation/asic/README.md
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# Synopsys

## Build Container

If the container is not yet built, run the following command from the `asic` directory:
```bash
docker build -t synopsys .
```

## Using ASAP7 PDK

ASAP7 is a submodule of this repository. To use it, run the following command to initialize the submodule:
```bash
git submodule init asap7sc7p5t_28
```

Then run the following to decompress the libraries and convert them to `.db` so that Synopsys can use them:
```bash
./prepare_asap7.sh
```

The converted libraries will be placed at `asap7_db/`.

## Running Synopsys

By default the script assumes that synopsys is installed at `$HOME/synopsys`. To use a different path, set the `SYNOPSYS_PATH` environment variable. We also assume that `license.dat` is located at the root of the synopsys installation directory.

Run `dc_shell` replacing:

- `<priority_bits>` with the number of bits used for priority
- `<element_bits>` with the number of bits used for elements
- `<clock_period>` with the clock period in ps (e.g., 1000.0 for 1GHz)
- `<design>` with the name of the design you want to synthesize in `{pifo, bbq}`:
```bash
PRIORITY_BITS=<priority_bits> ELEMENT_BITS=<element_bits> CLOCK_PERIOD=<clock_period> ./dc_shell -f <design>.tcl
```
2 changes: 2 additions & 0 deletions evaluation/asic/asap7_db/.gitignore
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*
!.gitignore
1 change: 1 addition & 0 deletions evaluation/asic/asap7sc7p5t_28
Submodule asap7sc7p5t_28 added at d88477
62 changes: 62 additions & 0 deletions evaluation/asic/asap_synth.tcl
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# TODO(sadok): Remove duplicated code with the other synthesis scripts.

# 16 seems to be the maximum allowed.
set_host_options -max_cores 16

set SynopsysInstall [getenv "STROOT"]
set SAED14 [getenv "SAED14"]
set SAED14_SRAM [getenv "SAED14_SRAM"]

set search_path [list \
"." \
[format "%s%s" $SynopsysInstall /libraries/syn] \
[format "%s%s" $SynopsysInstall /dw/sim_ver] \
[format "%s%s" $SynopsysInstall /dw] \
]

set lib_path "asap7_db"
set std_cell_lib [glob -directory $lib_path -- "*.db"]

set std_sram_cell_lib [list \
]

set synthetic_library "dw_foundation.sldb"
set target_library [concat $std_sram_cell_lib $std_cell_lib]
set link_library [concat $target_library [list $synthetic_library]]
set symbol_library [list generic.sdb]

set hdlin_sverilog_std 2009
set hdlin_ff_always_async_set_reset true
set hdlin_ff_always_sync_set_reset true
set hdlin_auto_save_templates true
set verilogout_show_unconnected_pins true
set compile_fix_multiple_port_ets true
set fsm_auto_inferring true
set fsm_enable_state_minimization true
set fsm_export_formality_state_info true
set synlib_wait_for_design_license "DesignWare"

analyze -format sverilog $SRC_FILES -vcs $VCS_OPTS
elaborate $DESIGN_TOPLEVEL
check_design

source synth.sdc

link

# compile -map_effort low
compile_ultra

report_timing -loops

write -format verilog -hierarchy -output \
[format "%s/%s.gate.v.rpt" ${REPORT_DIR} ${DESIGN_TOPLEVEL}]

write_sdf [format "%s/%s.gate.sdf.rpt" ${REPORT_DIR} ${DESIGN_TOPLEVEL}]
write_sdc [format "%s/%s.gate.sdc.rpt" ${REPORT_DIR} ${DESIGN_TOPLEVEL}]

report_timing > [format "%s/%s.timing.rpt" ${REPORT_DIR} ${DESIGN_TOPLEVEL}]
report_area -hierarchy > \
[format "%s/%s.area.rpt" ${REPORT_DIR} ${DESIGN_TOPLEVEL}]
report_power > [format "%s/%s.power.rpt" ${REPORT_DIR} ${DESIGN_TOPLEVEL}]
28 changes: 28 additions & 0 deletions evaluation/asic/bbq.tcl
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set DESIGN_TOPLEVEL "bbq"
set BITMAP_WIDTH $env(BITMAP_WIDTH)
set NUM_LEVELS $env(NUM_LEVELS)
set ELEMENT_BITS $env(ELEMENT_BITS)

# Using 1 GHz clock (period in ps).
# set clock_period 1000.0

# Using 3.1 GHz clock (period in ps).
# set clock_period 320.0

set clock_period $env(CLOCK_PERIOD)

set REPORT_DIR "report3/bbq_no_sram_${ELEMENT_BITS}_${NUM_LEVELS}_${BITMAP_WIDTH}_7nm_${clock_period}"
exec mkdir -p $REPORT_DIR

set VCS_OPTS "+define+BITMAP_WIDTH=${BITMAP_WIDTH} +define+ELEMENT_BITS=${ELEMENT_BITS}"

set SRC_FILES [list \
/src/evaluation/asic/common/sc_fifo_controller.sv \
/src/hardware/bbq/src/heap_ops.sv \
/src/hardware/bbq/src/ffs.sv \
/src/hardware/bbq/src/bbq_no_sram_${NUM_LEVELS}.sv \
]

source asap_synth.tcl

quit
97 changes: 97 additions & 0 deletions evaluation/asic/common/sc_fifo_controller.sv
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module sc_fifo_controller #(
parameter DWIDTH = 8,
parameter DEPTH = 2048,
parameter IS_SHOWAHEAD = 0,
parameter IS_OUTDATA_REG = 0,

localparam AWIDTH = $clog2(DEPTH)
)(
input logic clock,
input logic [DWIDTH-1:0] data,
input logic rdreq,
input logic wrreq,
output logic empty,
output logic full,
output logic [DWIDTH-1:0] q,

// External BRAM interface.
output logic [DWIDTH-1:0] bram_data,
output logic [AWIDTH-1:0] bram_rdaddress,
output logic [AWIDTH-1:0] bram_wraddress,
output logic bram_wren,
input logic [DWIDTH-1:0] bram_q
);

localparam FIFO_MAX_WIDTH = 2048;
localparam FIFO_MAX_DEPTH = 2**24;

logic push_req_n;
logic pop_req_n;
logic [DWIDTH-1:0] data_in;
logic _empty;
logic _full;

generate
if (IS_SHOWAHEAD) begin
$error("IS_SHOWAHEAD not supported.");
end

if (DWIDTH > FIFO_MAX_WIDTH) begin
$error("DWIDTH must be at most %d", FIFO_MAX_WIDTH);
end

if (DEPTH > FIFO_MAX_DEPTH) begin
$error("DEPTH must be at most %d", FIFO_MAX_DEPTH);
end

if (IS_OUTDATA_REG) begin
// Adding extra cycle for read.
always_ff @(posedge clock) begin
empty <= _empty;
end
end else begin
assign empty = _empty;
end
endgenerate

logic we_n;

logic [AWIDTH-1:0] rdaddress;
logic [AWIDTH-1:0] wraddress;

always_comb begin
push_req_n = ~wrreq;
pop_req_n = ~rdreq;
data_in = data;
full = _full;

// External BRAM interface.
bram_data = data;
bram_rdaddress = rdaddress;
bram_wraddress = wraddress;
bram_wren = ~we_n;
q = bram_q;
end

DW_fifoctl_s1_sf #(
.depth(DEPTH),
.rst_mode(1) // Synchonous reset.
) DW_fifoctl_s1_sf_inst (
.clk (clock),
.rst_n (1'b1), // Disable reset.
.push_req_n (push_req_n),
.pop_req_n (pop_req_n),
.diag_n (1'b1), // Disable diagnostic.
.we_n (we_n),
.empty (_empty),
.almost_empty (),
.half_full (),
.almost_full (),
.full (_full),
.error (),
.wr_addr (wraddress),
.rd_addr (rdaddress)
);

endmodule // sc_fifo
79 changes: 79 additions & 0 deletions evaluation/asic/convert_asap7.tcl
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set lib_path "asap7sc7p5t_28/LIB/NLDM/"
set db_dst "asap7_db/"

set libs [glob -directory $lib_path -- "*.lib"]
foreach lib $libs {
puts "$lib"
read_lib $lib
# set lib_name [file rootname [file tail $lib]]
# set db_name "${db_dst}${lib_name}.db"
# write_lib -output $db_name -format db $lib_name
}

# Some file names are different than the library names, therefore I manually
# listed them all below. If they fix this in the future this will not longer be
# needed. And the above lines inside the loop can be uncommented.

write_lib asap7sc7p5t_INVBUF_RVT_FF_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_INVBUF_RVT_FF_nldm_211120.db"
write_lib asap7sc7p5t_AO_SLVT_TT_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_AO_SLVT_TT_nldm_211120.db"
write_lib asap7sc7p5t_OA_RVT_TT_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_OA_RVT_TT_nldm_211120.db"
write_lib asap7sc7p5t_INVBUF_SRAM_TT_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_INVBUF_SRAM_TT_nldm_211120.db"
write_lib asap7sc7p5t_AO_SRAM_SS_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_AO_SRAM_SS_nldm_211120.db"
write_lib asap7sc7p5t_INVBUF_LVT_SS_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_INVBUF_LVT_SS_nldm_211120.db"
write_lib asap7sc7p5t_AO_LVT_TT_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_AO_LVT_TT_nldm_211120.db"
write_lib asap7sc7p5t_SIMPLE_LVT_TT_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_SIMPLE_LVT_TT_nldm_211120.db"
write_lib asap7sc7p5t_SEQ_SRAM_TT_nldm_220123 -format db -output "${db_dst}asap7sc7p5t_SEQ_SRAM_TT_nldm_220123.db"
write_lib asap7sc7p5t_AO_RVT_TT_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_AO_RVT_TT_nldm_211120.db"
write_lib asap7sc7p5t_SIMPLE_SLVT_TT_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_SIMPLE_SLVT_TT_nldm_211120.db"
write_lib asap7sc7p5t_OA_SLVT_SS_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_OA_SLVT_SS_nldm_211120.db"
write_lib asap7sc7p5t_SEQ_RVT_SS_nldm_220123 -format db -output "${db_dst}asap7sc7p5t_SEQ_RVT_SS_nldm_220123.db"
write_lib asap7sc7p5t_SIMPLE_SLVT_SS_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_SIMPLE_SLVT_SS_nldm_211120.db"
write_lib asap7sc7p5t_SIMPLE_LVT_SS_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_SIMPLE_LVT_SS_nldm_211120.db"
write_lib asap7sc7p5t_OA_SLVT_TT_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_OA_SLVT_TT_nldm_211120.db"
write_lib asap7sc7p5t_OA_LVT_FF_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_OA_LVT_FF_nldm_211120.db"
write_lib asap7sc7p5t_OA_RVT_SS_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_OA_RVT_SS_nldm_211120.db"
write_lib asap7sc7p5t_AO_RVT_SS_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_AO_RVT_SS_nldm_211120.db"
write_lib asap7sc7p5t_SEQ_SRAM_SS_nldm_220123 -format db -output "${db_dst}asap7sc7p5t_SEQ_SRAM_SS_nldm_220123.db"
write_lib asap7sc7p5t_OA_SRAM_SS_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_OA_SRAM_SS_nldm_211120.db"
write_lib asap7sc7p5t_AO_SRAM_FF_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_AO_SRAM_FF_nldm_211120.db"
write_lib asap7sc7p5t_INVBUF_SLVT_SS_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_INVBUF_SLVT_SS_nldm_211120.db"
write_lib asap7sc7p5t_INVBUF_LVT_FF_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_INVBUF_LVT_FF_nldm_211120.db"
write_lib asap7sc7p5t_AO_LVT_SS_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_AO_LVT_SS_nldm_211120.db"
write_lib asap7sc7p5t_SIMPLE_RVT_SS_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_SIMPLE_RVT_SS_nldm_211120.db"
write_lib asap7sc7p5t_INVBUF_SLVT_FF_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_INVBUF_SLVT_FF_nldm_211120.db"
write_lib asap7sc7p5t_SEQ_SLVT_FF_nldm_220123 -format db -output "${db_dst}asap7sc7p5t_SEQ_SLVT_FF_nldm_220123.db"
write_lib asap7sc7p5t_INVBUF_RVT_TT_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_INVBUF_RVT_TT_nldm_211120.db"
write_lib asap7sc7p5t_SIMPLE_RVT_TT_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_SIMPLE_RVT_TT_nldm_211120.db"
write_lib asap7sc7p5t_SIMPLE_SLVT_FF_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_SIMPLE_SLVT_FF_nldm_211120.db"
write_lib asap7sc7p5t_SEQ_LVT_TT_nldm_220123 -format db -output "${db_dst}asap7sc7p5t_SEQ_LVT_TT_nldm_220123.db"
write_lib asap7sc7p5t_AO_SLVT_FF_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_AO_SLVT_FF_nldm_211120.db"
write_lib asap7sc7p5t_SEQ_SLVT_SS_nldm_220123 -format db -output "${db_dst}asap7sc7p5t_SEQ_SLVT_SS_nldm_220123.db"
write_lib asap7sc7p5t_SIMPLE_SRAM_SS_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_SIMPLE_SRAM_SS_nldm_211120.db"
write_lib asap7sc7p5t_OA_SLVT_FF_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_OA_SLVT_FF_nldm_211120.db"
write_lib asap7sc7p5t_SEQ_RVT_TT_nldm_220123 -format db -output "${db_dst}asap7sc7p5t_SEQ_RVT_TT_nldm_220123.db"
write_lib asap7sc7p5t_INVBUF_LVT_TT_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_INVBUF_LVT_TT_nldm_211120.db"
write_lib asap7sc7p5t_SEQ_RVT_FF_nldm_220123 -format db -output "${db_dst}asap7sc7p5t_SEQ_RVT_FF_nldm_220123.db"
write_lib asap7sc7p5t_OA_SRAM_TT_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_OA_SRAM_TT_nldm_211120.db"
write_lib asap7sc7p5t_INVBUF_SLVT_TT_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_INVBUF_SLVT_TT_nldm_211120.db"
write_lib asap7sc7p5t_SIMPLE_SRAM_FF_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_SIMPLE_SRAM_FF_nldm_211120.db"
write_lib asap7sc7p5t_INVBUF_SRAM_SS_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_INVBUF_SRAM_SS_nldm_211120.db"
write_lib asap7sc7p5t_AO_LVT_FF_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_AO_LVT_FF_nldm_211120.db"
write_lib asap7sc7p5t_OA_SRAM_FF_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_OA_SRAM_FF_nldm_211120.db"
write_lib asap7sc7p5t_INVBUF_SRAM_FF_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_INVBUF_SRAM_FF_nldm_211120.db"
write_lib asap7sc7p5t_SIMPLE_LVT_FF_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_SIMPLE_LVT_FF_nldm_211120.db"
write_lib asap7sc7p5t_OA_LVT_TT_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_OA_LVT_TT_nldm_211120.db"
write_lib asap7sc7p5t_INVBUF_RVT_SS_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_INVBUF_RVT_SS_nldm_211120.db"
write_lib asap7sc7p5t_AO_SRAM_TT_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_AO_SRAM_TT_nldm_211120.db"
write_lib asap7sc7p5t_SEQ_SRAM_FF_nldm_220123 -format db -output "${db_dst}asap7sc7p5t_SEQ_SRAM_FF_nldm_220123.db"
write_lib asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.db"
write_lib asap7sc7p5t_AO_RVT_FF_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_AO_RVT_FF_nldm_211120.db"
write_lib asap7sc7p5t_AO_SLVT_SS_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_AO_SLVT_SS_nldm_211120.db"
write_lib asap7sc7p5t_OA_RVT_FF_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_OA_RVT_FF_nldm_211120.db"
write_lib asap7sc7p5t_OA_LVT_SS_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_OA_LVT_SS_nldm_211120.db"
write_lib asap7sc7p5t_SEQ_SLVT_TT_nldm_220123 -format db -output "${db_dst}asap7sc7p5t_SEQ_SLVT_TT_nldm_220123.db"
write_lib asap7sc7p5t_SEQ_LVT_FF_nldm_220123 -format db -output "${db_dst}asap7sc7p5t_SEQ_LVT_FF_nldm_220123.db"
write_lib asap7sc7p5t_SIMPLE_SRAM_TT_nldm_211120 -format db -output "${db_dst}asap7sc7p5t_SIMPLE_SRAM_TT_nldm_211120.db"
write_lib asap7sc7p5t_SEQ_LVT_SS_nldm_220123 -format db -output "${db_dst}asap7sc7p5t_SEQ_LVT_SS_nldm_220123.db"

quit
37 changes: 37 additions & 0 deletions evaluation/asic/dc_shell
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@@ -0,0 +1,37 @@
#!/usr/bin/env bash

SCRIPT_DIR="$( cd "$( dirname "${BASH_SOURCE[0]}" )" >/dev/null 2>&1 && pwd )"
PROJECT_DIR="${SCRIPT_DIR}/../.."

CONTAINER_SRC_PATH="/src"
CONTAINER_SYNOPSYS_PATH="/synopsys"
CONTAINER_WORK_PATH="/work"

DC_SHELL_PATH="${CONTAINER_SYNOPSYS_PATH}/syn/S-2021.06-SP5/bin/dc_shell"

SYNOPSYS_PATH_DEFAULT="${HOME}/synopsys"

if [[ -z "${SYNOPSYS_PATH}" ]]; then
echo "SYNOPSYS_PATH is undefined, using default value: $SYNOPSYS_PATH_DEFAULT"
SYNOPSYS_PATH="${SYNOPSYS_PATH_DEFAULT}"
fi

# docker build -t synopsys $SCRIPT_DIR

docker run -it --rm \
-w ${CONTAINER_WORK_PATH} \
--mount type=bind,src="${SYNOPSYS_PATH}",target=${CONTAINER_SYNOPSYS_PATH} \
--mount type=bind,src="${PROJECT_DIR}",target=${CONTAINER_SRC_PATH} \
--mount type=bind,src="${PWD}",target=${CONTAINER_WORK_PATH} \
--env PRIORITY_BITS=$PRIORITY_BITS \
--env ELEMENT_BITS=$ELEMENT_BITS \
--env BITMAP_WIDTH=$BITMAP_WIDTH \
--env NUM_LEVELS=$NUM_LEVELS \
--env CLOCK_PERIOD=$CLOCK_PERIOD \
--env LM_LICENSE_FILE="${CONTAINER_SYNOPSYS_PATH}/license.dat" \
--env STROOT="${CONTAINER_SYNOPSYS_PATH}/syn/S-2021.06-SP5" \
--env SAED14="${CONTAINER_SYNOPSYS_PATH}/SAED14nm_PDK_12142021/stdcell_rvt/db_nldm" \
--env SAED14_SRAM="${CONTAINER_SYNOPSYS_PATH}/SAED14nm_PDK_12142021/SAED14nm_EDK_SRAM_v_05072020/lib/sram/logic_synth" \
synopsys ${DC_SHELL_PATH} $@

# read -p "Press press enter to continue"
28 changes: 28 additions & 0 deletions evaluation/asic/lc_shell
Original file line number Diff line number Diff line change
@@ -0,0 +1,28 @@
#!/usr/bin/env bash

SCRIPT_DIR="$( cd "$( dirname "${BASH_SOURCE[0]}" )" >/dev/null 2>&1 && pwd )"
PROJECT_DIR="${SCRIPT_DIR}/../.."

CONTAINER_SRC_PATH="/src"
CONTAINER_SYNOPSYS_PATH="/synopsys"
CONTAINER_WORK_PATH="/work"

LC_SHELL_PATH="${CONTAINER_SYNOPSYS_PATH}/lc/S-2021.06-SP5/bin/lc_shell"

SYNOPSYS_PATH_DEFAULT="${HOME}/synopsys"

if [[ -z "${SYNOPSYS_PATH}" ]]; then
echo "SYNOPSYS_PATH is undefined, using default value: $SYNOPSYS_PATH_DEFAULT"
SYNOPSYS_PATH="${SYNOPSYS_PATH_DEFAULT}"
fi

docker run -it --rm \
-w ${CONTAINER_WORK_PATH} \
--mount type=bind,src="${SYNOPSYS_PATH}",target=${CONTAINER_SYNOPSYS_PATH} \
--mount type=bind,src="${PROJECT_DIR}",target=${CONTAINER_SRC_PATH} \
--mount type=bind,src="${PWD}",target=${CONTAINER_WORK_PATH} \
--env LM_LICENSE_FILE="${CONTAINER_SYNOPSYS_PATH}/license.dat" \
--env STROOT="${CONTAINER_SYNOPSYS_PATH}/syn/S-2021.06-SP5" \
--env SAED14="${CONTAINER_SYNOPSYS_PATH}/SAED14nm_PDK_12142021/stdcell_rvt/db_nldm" \
--env SAED14_SRAM="${CONTAINER_SYNOPSYS_PATH}/SAED14nm_PDK_12142021/SAED14nm_EDK_SRAM_v_05072020/lib/sram/logic_synth" \
synopsys ${LC_SHELL_PATH} $@
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