Cleanup 003 with thing noticed when making 00x

[dwillmore]

Removed INFO_BASE
Removed CRC_TypeDef
Removed DEBUGMCU_STOP
Fixed ESIG_TypeDef to match RM and 00x correct names
Fixed USART_TypeDef to match RM and 00x convert from 16bit to 32bit and remove reserved padding.
Fixed WWDG_TypeDef to match RM and 00x convert from 32bit to 16bit and add reserved padding.
Removed EXTEND_TypeDef
Remove all GPIO_ defines for bits 8 and higher. We only have 8 bit registers 0-7
Fixed GPIO_ defines to be 32 bit fields to match RM and 00x
Fixed AFIO_PCFR1register to properly name remapping fields (comments mostly) and remove unused defines for things we don't have
Removed dualmod defines from ADC_CTLR1
removed ADC_TSVREFE from ADC_CTLR2
Changed ADC_STATR to 32 bit from 8 bit
Changed ADC_IOFRx to 32 bit from 16 bit and corrected mask from 0x0fff to 0x02ff
Changed ADC_WDHTR and ADC_WDLTR to 32 bit from 16 bit and corrected mask from 0x0fff to 0x02ff
Changed ADC_IDATARx to 32 bit from 16 bit
Changed ADC_DLYR values to 32bit from 8 bit
Changed FLASH_STATR to 32 bit from a mixture of 8 and 16 bit
Changed FLASH_CTLR to 32 bits from nothing
Removed FLASH_OBR defines not in RM
Changed FLASH_OBR to 32 bit from 16 bit
Changed FLASH_WPR defines to match RM
Removed GPIO_CFGHR defines as we don't have 16 bit gpio
Cleanup AFIO_EXTI to add missing defines and make 32 bit.
Remving I2C_CTLR1 defines for features not in RM
Removed I2C_STARx defines for SMbus.
Changed PWR_* to remove unsued defines and convert to 32 bit from 16 bit Enhance RCC_CFGR0 with all the ADC divider values
Removed RCC_CFGR0 PLL divisors that are unused
Removed RCC_CFGR2 as there is none
Removed RCC_INTR defines that don't exist in the RM Changed TIM_SWEVGR to 16 bit from 8 bit
Changed TIM_CHxCVR to 32 bits from 16 bits and added LEVEL bits

[cnlohr]

I mean so far this looks really good.