Repository navigation
Emit exact array accessors for nonvector element storage - #609
Merged
Merged
Conversation
dadhi
requested changes
Nov 9, 2026
Classify vector types by their actual runtime type and share typed array Get/Address emission. Preserve lower bounds, writable struct element storage, reference covariance checks and ignored-read bounds/null checks. Keep ordinary vector access on its existing path.
jogibear9988
force-pushed
the
fix/nonvector-arrays-standalone
branch
from
November 9, 2026 22:25
3a8eb6a to
b6c4d1e
Compare
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Passing some nonvector array elements by reference emits invalid IL. Use the actual vector/nonvector type to choose element opcodes versus runtime
Get/Address/Setaccessors. Preserve lower bounds, writable struct storage, covariance checks and ignored-read validation.Validation
The focused regression reproduces a failure or crash on master
a0950432and passes with this change. Release solution build passes with zero warnings/errors. Both Standard and LightExpression native suites run.Measurements
Compare master
a0950432with this commit3a8eb6a0. Windows ARM64, Release; .NET 8.0.28 and 10.0.9. Compilation uses prebuilt trees; invocation uses precompiled delegates and excludes expression construction/compilation. Standard and LightExpression are measured separately.Two fresh process rounds reverse version-loading order, pin execution to one logical CPU, disable tiered compilation, warm both versions, and alternate measurement order. Values below are medians across 14 samples per side (seven per round; 30 ms calibration target).
Measured compilation and invocation allocations match master on every control. Control delegate IL matches master.
Identical-master control runs also varied: compilation -15.2% to +23.4%, invocation -21.5% to +8.9%. Timings below are observations, not a speedup or universal performance-neutrality claim. Cases that fail or produce invalid IL on master have no meaningful before/after invocation ratio; the table uses executable controls that return the expected result in both versions. Framework correctness is tested above; its performance is not measured here.
All table pairs are master → this change.
B/opis allocated bytes per operation.add_controlmultirank_readvector_array_readadd_controlmultirank_readvector_array_readadd_controlmultirank_readvector_array_readadd_controlmultirank_readvector_array_read