Move cpu into system

esp-hal-embassy/src/executor/interrupt.rs

@@ -4,8 +4,8 @@ use core::{cell::UnsafeCell, mem::MaybeUninit};
 
 use embassy_executor::SendSpawner;
 use esp_hal::{
-    cpu::Cpu,
     interrupt::{self, software::SoftwareInterrupt, InterruptHandler},
+    system::Cpu,
 };
 use portable_atomic::{AtomicUsize, Ordering};
 

esp-hal-embassy/src/executor/thread.rs

@@ -5,7 +5,7 @@ use core::marker::PhantomData;
 use embassy_executor::Spawner;
 #[cfg(all(low_power_wait, multi_core))]
 use esp_hal::interrupt::software::SoftwareInterrupt;
-use esp_hal::{cpu::Cpu, interrupt::Priority};
+use esp_hal::{interrupt::Priority, system::Cpu};
 #[cfg(low_power_wait)]
 use portable_atomic::{AtomicBool, Ordering};
 

esp-hal/src/analog/adc/riscv.rs

@@ -534,7 +534,7 @@ impl<ADCI> crate::private::Sealed for Adc<'_, ADCI, Blocking> {}
 
 impl<ADCI> InterruptConfigurable for Adc<'_, ADCI, Blocking> {
     fn set_interrupt_handler(&mut self, handler: InterruptHandler) {
-        for core in crate::cpu::Cpu::other() {
+        for core in crate::system::Cpu::other() {
             crate::interrupt::disable(core, InterruptSource);
         }
         unsafe { crate::interrupt::bind_interrupt(InterruptSource, handler.handler()) };
@@ -643,7 +643,7 @@ where
     pub fn into_blocking(self) -> Adc<'d, ADCI, Blocking> {
         if asynch::release_async_adc() {
             // Disable ADC interrupt on all cores if the last async ADC instance is disabled
-            for cpu in crate::cpu::Cpu::all() {
+            for cpu in crate::system::Cpu::all() {
                 crate::interrupt::disable(cpu, InterruptSource);
             }
         }

esp-hal/src/assist_debug.rs

@@ -52,7 +52,7 @@ impl<'d> DebugAssist<'d> {
     /// handlers.
     #[instability::unstable]
     pub fn set_interrupt_handler(&mut self, handler: InterruptHandler) {
-        for core in crate::cpu::Cpu::other() {
+        for core in crate::system::Cpu::other() {
             crate::interrupt::disable(core, Interrupt::ASSIST_DEBUG);
         }
         unsafe { crate::interrupt::bind_interrupt(Interrupt::ASSIST_DEBUG, handler.handler()) };

esp-hal/src/dma/mod.rs

@@ -61,12 +61,12 @@ pub use self::m2m::*;
 #[cfg(pdma)]
 pub use self::pdma::*;
 use crate::{
-    cpu::Cpu,
     interrupt::InterruptHandler,
     peripheral::{Peripheral, PeripheralRef},
     peripherals::Interrupt,
     soc::{is_slice_in_dram, is_valid_memory_address, is_valid_ram_address},
     system,
+    system::Cpu,
     Async,
     Blocking,
     DriverMode,
@@ -1873,7 +1873,7 @@ where
         self.clear_in(EnumSet::all());
 
         if let Some(interrupt) = self.rx_impl.peripheral_interrupt() {
-            for core in crate::cpu::Cpu::other() {
+            for core in crate::system::Cpu::other() {
                 crate::interrupt::disable(core, interrupt);
             }
             unsafe { crate::interrupt::bind_interrupt(interrupt, handler.handler()) };
@@ -2167,7 +2167,7 @@ where
         self.clear_out(EnumSet::all());
 
         if let Some(interrupt) = self.tx_impl.peripheral_interrupt() {
-            for core in crate::cpu::Cpu::other() {
+            for core in crate::system::Cpu::other() {
                 crate::interrupt::disable(core, interrupt);
             }
             unsafe { crate::interrupt::bind_interrupt(interrupt, handler.handler()) };

esp-hal/src/ecc.rs

@@ -992,7 +992,7 @@ impl<Dm: DriverMode> Ecc<'_, Dm> {
     /// handlers.
     #[instability::unstable]
     pub fn set_interrupt_handler(&mut self, handler: InterruptHandler) {
-        for core in crate::cpu::Cpu::other() {
+        for core in crate::system::Cpu::other() {
             crate::interrupt::disable(core, Interrupt::ECC);
         }
         unsafe { crate::interrupt::bind_interrupt(Interrupt::ECC, handler.handler()) };

esp-hal/src/gpio/mod.rs

@@ -717,7 +717,8 @@ pub(crate) fn bind_default_interrupt_handler() {
     }
     // The vector table doesn't contain a custom entry.Still, the
     // peripheral interrupt may already be bound to something else.
-    if interrupt::bound_cpu_interrupt_for(crate::cpu::Cpu::current(), Interrupt::GPIO).is_some() {
+    if interrupt::bound_cpu_interrupt_for(crate::system::Cpu::current(), Interrupt::GPIO).is_some()
+    {
         info!("Not using default GPIO interrupt handler: peripheral interrupt already in use");
         return;
     }
@@ -773,7 +774,7 @@ impl Io {
     /// `None`)
     #[instability::unstable]
     pub fn set_interrupt_handler(&mut self, handler: InterruptHandler) {
-        for core in crate::cpu::Cpu::other() {
+        for core in crate::system::Cpu::other() {
             crate::interrupt::disable(core, Interrupt::GPIO);
         }
         self.set_interrupt_priority(handler.priority());

esp-hal/src/i2c/master/mod.rs

@@ -1332,7 +1332,7 @@ impl Info {
     }
 
     fn set_interrupt_handler(&self, handler: InterruptHandler) {
-        for core in crate::cpu::Cpu::other() {
+        for core in crate::system::Cpu::other() {
             crate::interrupt::disable(core, self.interrupt);
         }
         self.enable_listen(EnumSet::all(), false);
@@ -1342,7 +1342,7 @@ impl Info {
     }
 
     fn disable_interrupts(&self) {
-        crate::interrupt::disable(crate::cpu::Cpu::current(), self.interrupt);
+        crate::interrupt::disable(crate::system::Cpu::current(), self.interrupt);
     }
 }
 

esp-hal/src/i2s/master.rs

@@ -1518,7 +1518,7 @@ mod private {
 
     impl RegisterAccessPrivate for I2S0 {
         fn set_interrupt_handler(&self, handler: InterruptHandler) {
-            for core in crate::cpu::Cpu::other() {
+            for core in crate::system::Cpu::other() {
                 crate::interrupt::disable(core, Interrupt::I2S0);
             }
             unsafe { crate::peripherals::I2S0::steal() }.bind_i2s0_interrupt(handler.handler());
@@ -1627,7 +1627,7 @@ mod private {
     #[cfg(i2s1)]
     impl RegisterAccessPrivate for I2S1 {
         fn set_interrupt_handler(&self, handler: InterruptHandler) {
-            for core in crate::cpu::Cpu::other() {
+            for core in crate::system::Cpu::other() {
                 crate::interrupt::disable(core, Interrupt::I2S1);
             }
             unsafe { crate::peripherals::I2S1::steal() }.bind_i2s1_interrupt(handler.handler());

esp-hal/src/interrupt/riscv.rs

@@ -23,9 +23,9 @@ pub use self::plic::*;
 pub use self::vectored::*;
 use super::InterruptStatus;
 use crate::{
-    cpu::Cpu,
     pac,
     peripherals::{Interrupt, INTERRUPT_CORE0},
+    system::Cpu,
 };
 
 /// Interrupt Error
@@ -560,7 +560,7 @@ mod vectored {
 #[cfg(not(plic))]
 mod classic {
     use super::{CpuInterrupt, InterruptKind, Priority};
-    use crate::{cpu::Cpu, peripherals::INTERRUPT_CORE0};
+    use crate::{peripherals::INTERRUPT_CORE0, system::Cpu};
 
     #[cfg_attr(place_switch_tables_in_ram, link_section = ".rwtext")]
     pub(super) static DISABLED_CPU_INTERRUPT: u32 = 0;
@@ -710,7 +710,7 @@ mod classic {
 #[cfg(plic)]
 mod plic {
     use super::{CpuInterrupt, InterruptKind, Priority};
-    use crate::{cpu::Cpu, peripherals::PLIC_MX};
+    use crate::{peripherals::PLIC_MX, system::Cpu};
 
     #[cfg_attr(place_switch_tables_in_ram, link_section = ".rwtext")]
     pub(super) static DISABLED_CPU_INTERRUPT: u32 = 31;

esp-hal/src/interrupt/software.rs

@@ -66,7 +66,7 @@ impl<const NUM: u8> SoftwareInterrupt<NUM> {
             _ => unreachable!(),
         };
 
-        for core in crate::cpu::Cpu::other() {
+        for core in crate::system::Cpu::other() {
             crate::interrupt::disable(core, interrupt);
         }
         unsafe { crate::interrupt::bind_interrupt(interrupt, handler.handler()) };

esp-hal/src/interrupt/xtensa.rs

@@ -6,7 +6,7 @@ use xtensa_lx_rt::exception::Context;
 
 pub use self::vectored::*;
 use super::InterruptStatus;
-use crate::{cpu::Cpu, pac, peripherals::Interrupt};
+use crate::{pac, peripherals::Interrupt, system::Cpu};
 
 /// Interrupt Error
 #[derive(Copy, Clone, Debug, PartialEq, Eq)]

esp-hal/src/lcd_cam/mod.rs

@@ -12,13 +12,12 @@ use core::marker::PhantomData;
 
 use crate::{
     asynch::AtomicWaker,
-    cpu::Cpu,
     handler,
     interrupt::InterruptHandler,
     lcd_cam::{cam::Cam, lcd::Lcd},
     peripheral::Peripheral,
     peripherals::{Interrupt, LCD_CAM},
-    system::GenericPeripheralGuard,
+    system::{Cpu, GenericPeripheralGuard},
     Async,
     Blocking,
 };
@@ -71,7 +70,7 @@ impl<'d> LcdCam<'d, Blocking> {
     /// handlers.
     #[instability::unstable]
     pub fn set_interrupt_handler(&mut self, handler: InterruptHandler) {
-        for core in crate::cpu::Cpu::other() {
+        for core in crate::system::Cpu::other() {
             crate::interrupt::disable(core, Interrupt::LCD_CAM);
         }
         unsafe { crate::interrupt::bind_interrupt(Interrupt::LCD_CAM, handler.handler()) };

esp-hal/src/lib.rs

@@ -175,7 +175,6 @@ pub use self::soc::ulp_core;
 
 #[cfg(any(dport, hp_sys, pcr, system))]
 pub mod clock;
-pub mod cpu;
 #[cfg(gpio)]
 pub mod gpio;
 #[cfg(any(i2c0, i2c1))]

esp-hal/src/otg_fs.rs

@@ -147,7 +147,7 @@ pub mod asynch {
     use procmacros::handler;
 
     use super::*;
-    use crate::cpu::Cpu;
+    use crate::system::Cpu;
 
     // From ESP32-S3 TRM:
     // Six additional endpoints (endpoint numbers 1 to 6), configurable as IN or OUT