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DSP: add dsp support #5
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base: siyuan-embarc_mli_v2.0-base_tempo
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Looks good in general, see comments.
Also, I'd like to see some test application added that tests the DSP context switching.
        
          
                arch/arc/core/offsets/offsets.c
              
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Does it make sense to save the control registers (DSP_CTRL and DSP_FFT_CTRL)?
I guess it depends on the application, but the rounding/saturation etc. settings may be a global choice, not per task.
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I'm not quite familiar with DSP. But I think If two threads are running two different DSP applications, DSP_CTRL is quite likely different. And Jacco in MLI team told me that, MLI sets the dsp mode on every call, make sure that at least accumulator registers and dsp mode are saved and restored.
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ok, if also DSP mode is used dynamically and not statically configured, then it should be saved. Maybe ask @JaccovG to review this PR as well?
| Thanks for adding a test, however it looks like the test needs some more work. It looks like copy-paste-edit of the fpu_sharing, but  with lots of fpu_sharing stuff still in (description etc. refer to floating point, it says it computes pi but it doesn't?). | 
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 Yes, it's still a draft, I need to add a test, which includes some DSP instructions to calculate something on XY memory to replace PI calculation. I'm trying to find examples from MLI, but it's not that easy to reproduce it without whole MLI library, do you have any ideas about example? The idea of register context switching from FPU_SHARING is good and also works for DSP register, I'll do more modifications and clean it up. | 
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Few comments remaining to be handle before submitting upstream.
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    | Thanks for adding the 'dsp' variant for nsim, but let's call the new config nsim_em11d instead of 'dsp' - that aligns with the ARC core names (see also the EMSK and EMSDP boards). Note that when introducing a new board, also the ARC boards documentation for nSIM simulation should be updated. | 
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    | 
 Could you please point the link of documentation that I'm going to amend. | 
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 boards\arc\nsim\doc\index.rst | 
add DSP reg in context switch add AGU reg in context switch to support XY mem add thread option and API to dis/enable DSP switch Signed-off-by: Siyuan Cheng <[email protected]>
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As the nSIM properties include caches, I suggested EM11D (EM9D has DSP, AGU/XY but no caches). But I believe the Zephyr configuration doesn't include the cache features (EM4_FPDA as basis, not EM6).
add nsim_em11d target specific for DSP feature Signed-off-by: Siyuan Cheng <[email protected]>
add dsp context switch test add complex multiplication test for ARC processor Signed-off-by: Siyuan Cheng <[email protected]>
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Thanks for addressing all my feedback!
add dsp config to enable dsp registers
This commit is just a basic dsp support, DSP SHARING is not guaranteed to fully succeed.