Skip to content

Commit

Permalink
riscv64: implement riscv64spec for instruction table generation
Browse files Browse the repository at this point in the history
Support generate all riscv extensions in
$GOROOT/src/src/cmd/internal/obj/riscv/inst.go,
also including "C" Standard Extension for Compressed Instructions,
used to support instruction decoding on riscv64 target.

riscv64spec relies on the riscv-opcodes project:
https://github.com/riscv/riscv-opcodes

Change-Id: Ib0589a87d1ba31fe431162d1f2d44a42bdb2ae06
Reviewed-on: https://go-review.googlesource.com/c/arch/+/602875
Reviewed-by: Mark Ryan <[email protected]>
LUCI-TryBot-Result: Go LUCI <[email protected]>
Reviewed-by: Carlos Amedee <[email protected]>
Reviewed-by: Cherry Mui <[email protected]>
Reviewed-by: Joel Sing <[email protected]>
Reviewed-by: Meng Zhuo <[email protected]>
  • Loading branch information
lrzlin authored and mengzhuo committed Aug 16, 2024
1 parent 9d90945 commit 655f7a0
Showing 1 changed file with 476 additions and 0 deletions.
Loading

0 comments on commit 655f7a0

Please sign in to comment.