Fixing accesses to the pcsx IO system.

[nicolasnoble]

No description provided.

[coderabbitai]

Walkthrough

This change refactors several inline functions in the hardware abstraction layer and an example Lua integration to use explicit MIPS inline assembly for hardware register access, replacing previous direct volatile pointer dereferences. No changes were made to function signatures or exported entities; all modifications are internal to function implementations.

Changes

File(s)	Change Summary
src/mips/common/hardware/pcsxhw.h	Refactored pcsx_msanAlloc, pcsx_msanRealloc, pcsx_msanSetChainPtr, pcsx_msanGetChainPtr to use inline assembly for hardware register access instead of direct pointer dereferencing. pcsx_msanFree unchanged.
src/mips/psyqo/examples/pcsxlua/pcsxlua.cpp	Updated pcsxRegisterVariable to use a single inline assembly instruction for hardware register write, removing direct pointer assignment.

Sequence Diagram(s)

sequenceDiagram
    participant Caller
    participant InlineFunction
    participant HardwareRegister

    Caller->>InlineFunction: Call pcsx_msanAlloc / pcsx_msanRealloc / pcsx_msanSetChainPtr / pcsx_msanGetChainPtr
    InlineFunction->>HardwareRegister: Access via inline assembly (lw/sw at 0x1f80:0x208c)
    HardwareRegister-->>InlineFunction: Return value (if applicable)
    InlineFunction-->>Caller: Return result (if applicable)

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sequenceDiagram
    participant LuaCaller
    participant pcsxRegisterVariable
    participant HardwareRegister

    LuaCaller->>pcsxRegisterVariable: Call pcsxRegisterVariable
    pcsxRegisterVariable->>HardwareRegister: Store value via inline assembly (sw at 0x1f80:0x2081)

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Estimated code review effort

🎯 2 (Simple) | ⏱️ ~8 minutes

Possibly related PRs

• Implement DMA-msan compatibility #1866: Implements DMA-msan compatibility and introduces pcsx_msanSetChainPtr and pcsx_msanGetChainPtr, which are directly modified in this PR.
• Adding "msan"-like feature. #1855: Adds msanAlloc, msanRealloc, and msanFree functions in pcsxhw.h, which correspond to the functions refactored in this PR.

Poem

🐇
Assembly whispers where pointers once crept,
Hardware registers guarded, secrets now kept.
Lua and MIPS in harmony dance,
With sw and lw, they seize their chance.
A hop, a skip, through memory’s gate—
Inline and tidy, the code feels great!

Note

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📥 Commits

Reviewing files that changed from the base of the PR and between df3cc9f and e1be093.

📒 Files selected for processing (2)

• src/mips/common/hardware/pcsxhw.h (1 hunks)
• src/mips/psyqo/examples/pcsxlua/pcsxlua.cpp (1 hunks)

🚧 Files skipped from review as they are similar to previous changes (2)

• src/mips/common/hardware/pcsxhw.h
• src/mips/psyqo/examples/pcsxlua/pcsxlua.cpp

⏰ Context from checks skipped due to timeout of 90000ms. You can increase the timeout in your CodeRabbit configuration to a maximum of 15 minutes (900000ms). (12)

• GitHub Check: macos-arm-build-and-test
• GitHub Check: macos-intel-build-and-test
• GitHub Check: pcsx-redux (x86_64-linux)
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