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Preliminary UR configurations for experiments #5

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Merged
linev merged 2 commits into from
Oct 12, 2026
Merged

Preliminary UR configurations for experiments #5

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17cb808
Preliminary UR configurations for experiments
mvonbuelow Oct 9, 2026
72a80b5
Allow up to 5 bits of itime
mvonbuelow Oct 9, 2026
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37 changes: 22 additions & 15 deletions framework/hadaq/TdcProcessor.cxx
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Original file line number Diff line number Diff line change
Expand Up @@ -2432,23 +2432,30 @@ bool hadaq::TdcProcessor::DoBufferScan(const base::Buffer& buf, bool first_scan)
return !iserr;
}

ur_config tdc5_cfg_2051;

std::unordered_map<int, ur_config> tdc5_cfgs;
ur_config default_cfg;

void _init_ur_config()
{
if (tdc5_cfgs.size() != 0)
if (!tdc5_cfgs.empty())
return;

tdc5_cfg_2051.coarsetime_len = 18;
tdc5_cfg_2051.finetime_len = 11;
tdc5_cfg_2051.tdc_type = 3;
tdc5_cfg_2051.freq = 150;
tdc5_cfg_2051.has_edge_type = true;
tdc5_cfg_2051.triggerDlen = 20.345;
// TODO: Handle this in separate TDC configuration files
ur_default_config(&default_cfg);

// TODO: Handle this in separate TDC configuration files
ur_config cfg_2051, cfg_2052, cfg_2053;

cfg_2053 = cfg_2052 = cfg_2051 = default_cfg;

tdc5_cfgs[2051] = tdc5_cfg_2051;
cfg_2052.coarsetime_len = 17;
cfg_2052.finetime_len = 12;
cfg_2053.coarsetime_len = 16;
cfg_2053.finetime_len = 13;

tdc5_cfgs[2051] = cfg_2051;
tdc5_cfgs[2052] = cfg_2052;
tdc5_cfgs[2053] = cfg_2053;
}

/////////////////////////////////////////////////////////////////////////////////////////////////////////
Expand Down Expand Up @@ -2526,16 +2533,16 @@ bool hadaq::TdcProcessor::DoBuffer5Scan(const base::Buffer& buf, bool first_scan
_init_ur_config();

auto entry = tdc5_cfgs.find(devid);
ur_config *cfg = entry != tdc5_cfgs.end() ? &entry->second : &default_cfg;

ur_config *cfg = entry != tdc5_cfgs.end() ? &entry->second : &tdc5_cfg_2051;
ur_set_config(&tdc5_it, cfg);

if (!fIsCustomMhz)
SetCustomMhz(cfg->freq);

if (fToTdflt) {
double hmin = (int) (cfg->triggerDlen - TotBins/100);
SetToTRange(cfg->triggerDlen, hmin, hmin + TotBins/50);
double hmin = (int) (cfg->trigger_d_period - TotBins/100);
SetToTRange(cfg->trigger_d_period, hmin, hmin + TotBins/50);
}

const char *tu_buf = (const char *) tu->RawHeader();
Expand Down Expand Up @@ -2603,7 +2610,7 @@ bool hadaq::TdcProcessor::DoBuffer5Scan(const base::Buffer& buf, bool first_scan
ChannelRec& rec = fCh[chid];

unsigned atan = fine & 255;
unsigned itime = (fine >> 8) & 7;
unsigned itime = fine >> 8;

if (rec.has_iqcal) {
// just produce normal fine counter value
Expand All @@ -2612,7 +2619,7 @@ bool hadaq::TdcProcessor::DoBuffer5Scan(const base::Buffer& buf, bool first_scan
// accumulate statistic first
if (first_scan) {
if (rec.iqcal.empty())
rec.iqcal.resize(256, 8, 2); // two channels - rising and falling edge
rec.iqcal.resize(256, 32, 2); // two channels - rising and falling edge
if (isrising) {
rec.all_rising_stat++;
rec.iqcal.set_and_update(0, itime, atan);
Expand Down
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