hello-nexys

Hello Nexys from Project F

Hello Nexys is a three-part introduction to FPGA development with Verilog and the Digilent Nexys Video board.
This series is also available for the Arty A7.

• Hello Nexys - Part 1
  • A source
  • B source
  • C source
  • D source
• Hello Nexys - Part 2
  • E source
  • F source
  • G source
  • H source
  • I source
• Hello Nexys - Part 3 (coming spring 2021)

For other designs from Project F, see the main README or visit projectf.io.