Stars
Public repository of the data, scripts and methodology presented in the paper "Towards On-Board SAR Processing with FPGA Accelerators and a PCIe Interface"
分享免费梯子/科学上网/代理/shadowsocks(SS)/ShadowsocksR(SSR)/V2ray(vmess)代理,2小时更新一次,分享Clash代理订阅源和配置文件订阅链接。
Seminal work on blockNDP largely developed @ Huawei Research
xk265:HEVC/H.265 Video Encoder IP Core (RTL)
OpenTitan: Open source silicon root of trust
This is an SoC design dedicated to Keyword Spotting (KWS) based on a neural-network accelerator and the wujian100 platform.
The C++ class library that deals with the CCSDS packet format.
Serial ATA Host Bus Adapter Core for Virtex 6
Turning .NET software into FPGA hardware for faster execution and lower power usage.
An HLS-synthesizable Dynamic Memory Manager for FPGAs
HLS Project of pp4fpgas - https://github.com/xupsh/pp4fpgas-cn
TCP-like protocol over a laser-communication system, implemented on an FPGA
FPGA-based Ethernet Transmitter-Receiver using various levels and protocols (MAC, IP, UDP)
Streaming FPGA/ASIC code generator for Google Protocol Buffers.
Flexible Byte transport protocol for bus bridging CPUs to FPGAs over UART,SPI,SERDES physical interfaces
A Real-time Inter-Process Communication (IPC) mechanism and library