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nyanmisaka
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This Wa is needed for using DG1 with the upstream i915 kernel.

Partially fixes:
#1415 (comment)

The other part needs to be fixed on KMD side by disabling HCP_POWERGATE and MFXVDENC_POWERGATE for DG1. Unlike TGLx, DG1 doesn't support sub-pipe PG and setting these bits will cause HEVC and VP9 decoding failure.

See also https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13381

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@Jexu Inspired by the regression in Xe KMD, I'm sure the above will work together to make DG1 usable in upstream i915.

Linux 6.13.0-rc3-1-drm-tip-git-g512428908f34 #25 SMP PREEMPT_DYNAMIC Thu, 19 Dec 2024 12:16:47 +0000 x86_64 GNU/Linux

[    1.270700] i915 0000:03:00.0: Force probing unsupported Device ID 4905, tainting kernel
[    1.270742] i915 0000:03:00.0: [drm] Found dg1 (device ID 4905) discrete display version 12.00 stepping B0
[    1.344611] i915 0000:03:00.0: vgaarb: deactivate vga console
[    1.370565] i915 0000:03:00.0: [drm] Finished loading DMC firmware i915/dg1_dmc_ver2_02.bin (v2.2)
[    1.399276] i915 0000:03:00.0: [drm] GT0: GuC firmware i915/dg1_guc_70.bin version 70.36.0
[    1.399279] i915 0000:03:00.0: [drm] GT0: HuC firmware i915/dg1_huc.bin version 7.9.3
[    1.403806] i915 0000:03:00.0: [drm] GT0: HuC: authenticated for all workloads
[    1.404534] i915 0000:03:00.0: [drm] GT0: GUC: submission enabled
[    1.404534] i915 0000:03:00.0: [drm] GT0: GUC: SLPC enabled
[    1.404768] i915 0000:03:00.0: [drm] GT0: GUC: RC enabled
[    1.504262] i915 0000:03:00.0: [drm] fb0: i915drmfb frame buffer device

@nyanmisaka
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Linux 6.13+ and LTS releases (6.1.124+, 6.6.70+ and 6.12.9+) have included the DG1 powergate fix.

@Jexu @XinfengZhang
So can we merge this to end the long-standing issues on DG1 when using upstream version of i915 KMD?


Also, if I understand correctly, the MEDIA_WR_SKU(skuTable, FtrGucSubmission, 1) flag should also be enabled.

The kernel 5.16+ enables GuC submission on DG1 by default, just like it does on ADL-P/ADL-N+.
torvalds/linux@9175fff

From 9175ffff5ea9f2b9e956f7458d3fa38eec8f6ec8 Mon Sep 17 00:00:00 2001
From: Matthew Brost <[email protected]>
Date: Thu, 16 Sep 2021 09:28:18 -0700
Subject: [PATCH] drm/i915/guc: Enable GuC submission by default on DG1

Enable GuC submission by default on DG1

Signed-off-by: Matthew Brost <[email protected]>
Reviewed-by: John Harrison <[email protected]>
Signed-off-by: John Harrison <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]

This Wa is needed for using DG1 with the upstream i915 kernel.

Partially fixes:
intel#1415 (comment)

The other part needs to be fixed on KMD side by disabling
HCP_POWERGATE and MFXVDENC_POWERGATE for DG1. Unlike TGLx,
DG1 doesn't support sub-pipe PG and setting these bits will
cause HEVC and VP9 decoding failure.

See also https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13381

Signed-off-by: nyanmisaka <[email protected]>
@nyanmisaka
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Hi @XinfengZhang, could you spare a minute to merge this simple fix?

DG1 is now available in both i915 & Xe KMD in upstream linux. See also #1920

@XinfengZhang XinfengZhang added the verifying PR: fix ready and verifying with build/test label Apr 25, 2025
@intel-mediadev intel-mediadev merged commit 93c07d9 into intel:master Apr 27, 2025
@nyanmisaka nyanmisaka deleted the dg1-wa-disable-object-capture branch April 27, 2025 09:42
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