[PW_SID:1100757] riscv: dts: spacemit: k3: Add Ziccrse extension for X100 cores#2015
[PW_SID:1100757] riscv: dts: spacemit: k3: Add Ziccrse extension for X100 cores#2015linux-riscv-bot wants to merge 1 commit into
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Add the Ziccrse ISA extension to all eight X100 cores. Ziccrse provides a forward progress guarantee on LR/SC sequences in main memory regions with cacheability and coherence PMAs. The SpacemiT X100 core supports it per the SpacemiT K3 hardware specification. Signed-off-by: Guodong Xu <guodong@riscstar.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
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Patch 1: "riscv: dts: spacemit: k3: Add Ziccrse extension for X100 cores" |
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Patch 1: "riscv: dts: spacemit: k3: Add Ziccrse extension for X100 cores" |
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Patch 1: "riscv: dts: spacemit: k3: Add Ziccrse extension for X100 cores" |
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Patch 1: "riscv: dts: spacemit: k3: Add Ziccrse extension for X100 cores" |
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Patch 1: "riscv: dts: spacemit: k3: Add Ziccrse extension for X100 cores" |
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Patch 1: "riscv: dts: spacemit: k3: Add Ziccrse extension for X100 cores" |
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Patch 1: "riscv: dts: spacemit: k3: Add Ziccrse extension for X100 cores" |
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Patch 1: "riscv: dts: spacemit: k3: Add Ziccrse extension for X100 cores" |
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Patch 1: "riscv: dts: spacemit: k3: Add Ziccrse extension for X100 cores" |
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Patch 1: "riscv: dts: spacemit: k3: Add Ziccrse extension for X100 cores" |
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Patch 1: "riscv: dts: spacemit: k3: Add Ziccrse extension for X100 cores" |
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Patch 1: "riscv: dts: spacemit: k3: Add Ziccrse extension for X100 cores" |
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PR for series 1100757 applied to workflow__riscv__fixes
Name: riscv: dts: spacemit: k3: Add Ziccrse extension for X100 cores
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=1100757
Version: 1