T113S SPI support #218
T113S SPI support #218
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paulkocialkowski
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paulkocialkowski
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Thanks for your work! See some specific comments inline.
You might want to include the work from #208 since you're touching the same areas.
Also please use a "fel-spiflash: " prefix for the commit messages (which makes it easier to see which part of sunxi-tools each commits affects) and generally use an action-oriented wording such as "Add support for T113-S3 SPI" rather than a descriptive title.
Other than the requested changes it all looks good, nice work!
| uint32_t pin_idx = pin_num % 8; | ||
| uint32_t x = readl(cfg_reg); | ||
| x &= ~(0x7 << (pin_idx * 4)); | ||
| x &= ~(0xf << (pin_idx * 4)); |
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You could mention in the commit log that the field now uses 4 bits. It was discussed in #208
Also you might want to include changes from this PR as it seems stalled currently.
| soc_info_t *soc_info = dev->soc_info; | ||
| switch (soc_info->soc_id) { | ||
| case 0x1859: /* D1/D1s/R528/T113-S3 */ | ||
| // CCU |
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This comment could be removed, also it's not the same comment style as the rest of the file (/* */).
| #define SUNIV_GPC_SPI0 (2) | ||
| #define SUNXI_GPC_SPI0 (3) | ||
| #define SUN50I_GPC_SPI0 (4) | ||
| #define SUN8I_GPC_SPI0 (2) |
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Unfortunately the original author of the file aligned with spaces, but please stick to it.
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This adds SPI support for R528/T113-S3.
T113 has different SPI, GPIO and CCM (CCU - clock control unit) base addresses. Also it has different step between gpio banks, so now
gpio_base()returns base for givenport_num.Tested on LCPI-PC-F133-T113-D1S-V1.3 board with Windbond W25Q128JVSIQ SPI flash soldered.
Write and read are also tested with some random file and md5sum check of initial and readback files.