Allwinner A133 sunxi-fel and UART support #220
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This was referenced Mar 19, 2025
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The Allwinner A133 is a slightly older SoC (around 2020) with four Cortex-A53 cores, sharing many treats with the H6. The A100 and R818 are reportedly the same chip, just in different bins or packaging. The chip has only 16K of SRAM-A1, but this is immediately followed by 128K of SRAM-C, with later 64K of SRAM-A2, after some gap. The BootROM SRAM usage is similar to other SoCs: there is the IRQ stack growing down from a 5K offset in SRAM A1, and probably some buffers located towards the end of SRAM C. We can use the area just before those buffers for the IRQ stack backup, which gives us a nice contiguous 128K SRAM area for any payloads. This setup is known to boot the WIP mainline U-Boot setup, including some placeholder TF-A port for now. SPL execution, including returning back to the BROM, works, also the 64-bit switch, as well as the SID dump. Signed-off-by: Andre Przywara <[email protected]>
The Allwinner A100/A133/R818 SoCs look very similar to the H6, sharing most of the peripheral's location in the memory map, with the debug UART typically at PB9/PB10. Add support for this SoC, by just filling a new entry in the new SoC struct, no further changes needed here. Tested on a Liontron H-A133L board. Signed-off-by: Andre Przywara <[email protected]>
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tested on a MagicX Mini Zero28 sporting a A133P. |
paulkocialkowski
approved these changes
Mar 20, 2025
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This adds support for the A133 SoC, with the A100 and the R818 sharing the same die, and being apparently fully compatible. Nothing special here, the SoC is quite similar to the already supported H6, so not many changes this time.