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!fixup address review comments, thanks
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2 files changed

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lines changed

2 files changed

+5
-5
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llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -7217,9 +7217,9 @@ static void fixReductionScalarResumeWhenVectorizingEpilog(
72177217
((CmpOp == StartV && isGuaranteedNotToBeUndefOrPoison(CmpOp))));
72187218
assert(IsExpectedPattern && "Unexpected reduction resume pattern");
72197219
MainResumeValue = OrigResumeV;
7220-
} else {
7221-
if (auto *VPI = dyn_cast<VPInstruction>(EpiRedHeaderPhi->getStartValue()))
7222-
MainResumeValue = VPI->getOperand(0)->getUnderlyingValue();
7220+
} else if (auto *VPI =
7221+
dyn_cast<VPInstruction>(EpiRedHeaderPhi->getStartValue())) {
7222+
MainResumeValue = VPI->getOperand(0)->getUnderlyingValue();
72237223
}
72247224

72257225
PHINode *MainResumePhi = cast<PHINode>(MainResumeValue);

llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -833,9 +833,9 @@ bool VPlanTransforms::legalizeUnclassifiedPhis(VPlan &Plan) {
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// The incoming value must be a min/max instrinsic.
834834
// TODO: Also handle the select variant.
835835
Intrinsic::ID ID = Intrinsic::not_intrinsic;
836-
if (auto *WideInt = dyn_cast<VPWidenIntrinsicRecipe>(MinMaxOp))
836+
if (auto *WideInt = dyn_cast<VPWidenIntrinsicRecipe>(MinMaxOp)) {
837837
ID = WideInt->getVectorIntrinsicID();
838-
else {
838+
} else {
839839
auto *RepR = dyn_cast<VPReplicateRecipe>(MinMaxOp);
840840
if (!RepR || !isa<IntrinsicInst>(RepR->getUnderlyingInstr()))
841841
return false;

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