Search results

[BOLT][RISCV]Fix handling of GOT relocation

backend:RISC-V

BOLT

Status: Open (in progress).

llvm/llvm-projectnumber 149658

#149658 In llvm/llvm-project;

· dinyy opened on Jul 19, 2025

[RISCV] Separate the analysis part of RISCVInsertVSETVLI.

backend:RISC-V

Status: Open (in progress).

llvm/llvm-projectnumber 149574

#149574 In llvm/llvm-project;

· mgudim opened on Jul 18, 2025

[SLP] Check for extracts, being replaced by original scalars, for user nodes

backend:RISC-V

llvm:transforms

vectorizers

Status: Open (in progress).

llvm/llvm-projectnumber 149572

#149572 In llvm/llvm-project;

· alexey-bataev opened on Jul 18, 2025

[RISCV] Handle recurrences in VLOptimizer

backend:RISC-V

Status: Open.

#149354 In llvm/llvm-project;

· lukel97 opened on Jul 17, 2025

[RISCV] Propagate VL from segment store in VLoptimizer

backend:RISC-V

Status: Open.

#149350 In llvm/llvm-project;

· topperc opened on Jul 17, 2025

[LV] Use ExtractLane(LastActiveLane, V) live outs when tail-folding. (WIP)

backend:RISC-V

llvm:transforms

vectorizers

Status: Open (in progress).

llvm/llvm-projectnumber 149042

#149042 In llvm/llvm-project;

· fhahn opened on Jul 16, 2025

Replace isSupportedInstr with RISCVII:elementsDependOnVL in RISCVVLOptimizer

backend:RISC-V

Status: Open.

Task

#149018 In llvm/llvm-project;

· lukel97 opened on Jul 16, 2025

[Clang] [Driver] Canoncalise <code>-internal-isystem</code> include paths

backend:MIPS

backend:RISC-V

clangClang issues not falling into any other categoryClang issues not falling into any other category

clang:driver'clang' and 'clang++' user-facing binaries. Not 'clang-cl''clang' and 'clang++' user-facing binaries. Not 'clang-cl'

Status: Open (in progress).

llvm/llvm-projectnumber 148745

#148745 In llvm/llvm-project;

· Sirraide opened on Jul 14, 2025

[clang][RISCV] Always pass &amp; return flexible array member structs indirectly.

backend:RISC-V

clangClang issues not falling into any other categoryClang issues not falling into any other category

clang:codegenIR generation bugs: mangling, exceptions, etc.IR generation bugs: mangling, exceptions, etc.

Status: Open (in progress).

llvm/llvm-projectnumber 148541

#148541 In llvm/llvm-project;

· resistor opened on Jul 13, 2025

RVV intrinsics not the best register allocation

backend:RISC-V

missed-optimization

Status: Open.

#148422 In llvm/llvm-project;

· camel-cdr opened on Jul 13, 2025

[CGP]: Optimize mul.overflow.

backend:AArch64

backend:ARM

backend:loongarch

backend:PowerPC

backend:RISC-V

backend:X86

llvm:codegen

Status: Open (in progress).

llvm/llvm-projectnumber 148343

#148343 In llvm/llvm-project;

· hassnaaHamdi opened on Jul 12, 2025

[RISCV] RFC: Add PE/COFF file output support

backend:RISC-V

debuginfo

llvm:binary-utilities

llvm:codegen

Status: Open (in progress).

llvm/llvm-projectnumber 148045

#148045 In llvm/llvm-project;

· JasonBrave opened on Jul 10, 2025