[pwm,rtl] Rewrite a second write-enable more explicitly

This is analogous to the previous commit. Before this change, there
are two holes that have htbt_ctr_q and the predicate false (either
because blink_en_i is false or htbt_en_i is false).

As before, this isn't possible. If the predicate is not true then
htbt_ctr_d will be zero (so htbt_ctr_q cannot become nonzero). If it
was nonzero before and we are changing the predicate to become false,
the register write will cause clr_blink_cntr_i to go high, zeroing
htbt_ctr_q.

Signed-off-by: Rupert Swarbrick <[email protected]>

hw/ip/pwm/rtl/pwm_chan.sv

@@ -78,8 +78,8 @@ module pwm_chan #(
     end else begin
       if (clr_blink_cntr_i) begin
         htbt_ctr_q <= '0;
-      end else begin
-        htbt_ctr_q <= (blink_en_i && htbt_en_i) ? htbt_ctr_d : htbt_ctr_q;
+      end else if (blink_en_i && htbt_en_i) begin
+        htbt_ctr_q <= htbt_ctr_d;
       end
     end
   end