Added support for Digilent Genesys 2 target #130
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kaolpr
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Sep 1, 2022
Based on: - m-labs/misoc#130 - m-labs/migen#264 Signed-off-by: Mikołaj Sowiński <[email protected]>
kaolpr
added a commit
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Sep 1, 2022
Based on: - m-labs/misoc#130 - m-labs/migen#264 Signed-off-by: Mikołaj Sowiński <[email protected]>
kaolpr
added a commit
to Technosystem-Labs/artiq
that referenced
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Sep 1, 2022
Based on: - m-labs/misoc#130 - m-labs/migen#264 Signed-off-by: Mikołaj Sowiński <[email protected]>
7 tasks
misoc/targets/digilent_genesys2.py
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| def main(): | ||
| parser = argparse.ArgumentParser(description="MiSoC port to the KC705") |
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Please split into three commits. |
Why? |
Had no time to debug. Reducing to 1x non-IO worked. I do have it on my TODO list, but with low priority. |
kaolpr
added a commit
to Technosystem-Labs/artiq
that referenced
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Jan 16, 2023
Based on: - m-labs/misoc#130 - m-labs/migen#264 Signed-off-by: Mikołaj Sowiński <[email protected]>
| #!/usr/bin/env python3 | ||
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| # | ||
| # This file is based on LiteX-Boards Digilent Genesys 2 target. |
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Yeah, itself based on code that I wrote 10-11 years ago and which changed remarkably little since...
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Uses m-labs/migen#264