Add gpu work period support for i915

drivers/gpu/drm/i915/Makefile

@@ -362,6 +362,8 @@ i915-y += \
 
 i915-y += i915_perf.o
 
+i915-y += i915_gpu_work.o
+
 # Protected execution platform (PXP) support. Base support is required for HuC
 i915-y += \
 	pxp/intel_pxp.o \

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

@@ -34,9 +34,6 @@
 #include "i915_trace.h"
 #include "i915_user_extensions.h"
 
-#define CREATE_TRACE_POINTS
-#include "intel_power_gpu_work_period_trace.h"
-
 struct eb_vma {
 	struct i915_vma *vma;
 	unsigned int flags;
@@ -3363,7 +3360,6 @@ i915_gem_do_execbuffer(struct drm_device *dev,
 	struct sync_file *out_fence = NULL;
 	int out_fence_fd = -1;
 	int err;
-	struct drm_i915_file_private *file_priv;
 
 	BUILD_BUG_ON(__EXEC_INTERNAL_FLAGS & ~__I915_EXEC_ILLEGAL_FLAGS);
 	BUILD_BUG_ON(__EXEC_OBJECT_INTERNAL_FLAGS &
@@ -3525,30 +3521,6 @@ i915_gem_do_execbuffer(struct drm_device *dev,
 		dma_fence_put(eb.composite_fence);
 
 	eb_requests_put(&eb);
-	/* Add one Workaround to pass the cts module GpuMetrics case
-	   com.android.cts.graphics.GpuWorkDumpsysTest, total_active_duration_ns
-	   hardcoded to 1us, expected end_time is at request retirement, but start
-	   time and end time can't get in serial from each request, hence implement
-	   workaound to quick pass cts case.
-	*/
-
-	file_priv = eb.file->driver_priv;
-	if (file_priv) {
-		mutex_lock(&dev->filelist_mutex);
-		u64 end_time;
-		u64 start_time = ktime_get_raw_ns();
-		const struct cred* cred = get_current_cred();
-		const unsigned int uid = cred->euid.val;
-		put_cred(cred);
-		//Exclude system app uid
-		if ((uid > 10000) && (start_time > file_priv->last_end_time)) {
-			end_time = start_time + 1000;
-			trace_gpu_work_period(i915->drm.primary->index, uid,
-				start_time, end_time, 1000);
-			file_priv->last_end_time = end_time;
-		}
-		mutex_unlock(&dev->filelist_mutex);
-	}
 
 err_vma:
 	eb_release_vmas(&eb, true);

drivers/gpu/drm/i915/gt/intel_context.c

@@ -385,7 +385,6 @@ intel_context_init(struct intel_context *ce, struct intel_engine_cs *engine)
 	ce->sseu = engine->sseu;
 	ce->ring = NULL;
 	ce->ring_size = SZ_4K;
-	ce->last_end_time = 0;
 
 	ewma_runtime_init(&ce->stats.runtime.avg);
 

drivers/gpu/drm/i915/gt/intel_context_types.h

@@ -112,7 +112,6 @@ struct intel_context {
 	u32 ring_size;
 	struct intel_ring *ring;
 	struct intel_timeline *timeline;
-	u64 last_end_time;
 
 	unsigned long flags;
 #define CONTEXT_BARRIER_BIT		0
@@ -153,6 +152,7 @@ struct intel_context {
 			struct ewma_runtime avg;
 			u64 total;
 			u32 last;
+			u32 dt;
 			I915_SELFTEST_DECLARE(u32 num_underflow);
 			I915_SELFTEST_DECLARE(u32 max_underflow);
 		} runtime;
@@ -174,6 +174,8 @@ struct intel_context {
 	/** sseu: Control eu/slice partitioning */
 	struct intel_sseu sseu;
 
+	u64 start_time_ns;
+
 	/**
 	 * pinned_contexts_link: List link for the engine's pinned contexts.
 	 * This is only used if this is a perma-pinned kernel context and

drivers/gpu/drm/i915/gt/intel_engine_cs.c

@@ -1601,6 +1601,8 @@ int intel_engines_init(struct intel_gt *gt)
 			return err;
 
 		intel_engine_add_user(engine);
+
+		i915_gpu_work_stats_init(engine);
 	}
 
 	return 0;

drivers/gpu/drm/i915/gt/intel_engine_types.h

@@ -26,6 +26,7 @@
 #include "intel_uncore.h"
 #include "intel_wakeref.h"
 #include "intel_workarounds_types.h"
+#include "i915_gpu_work.h"
 
 /* HW Engine class + instance */
 #define RENDER_CLASS		0
@@ -169,6 +170,11 @@ struct intel_engine_execlists {
 	 */
 	struct timer_list preempt;
 
+	/**
+	 * @work_period_timer: emit the gpu work period stats event
+	 */
+	struct timer_list work_period_timer;
+
 	/**
 	 * @preempt_target: active request at the time of the preemption request
 	 *
@@ -487,6 +493,7 @@ struct intel_engine_cs {
 		struct i915_pmu_sample sample[I915_ENGINE_SAMPLE_COUNT];
 	} pmu;
 
+	struct i915_engine_work gpu_work;
 	struct intel_hw_status_page status_page;
 	struct i915_ctx_workarounds wa_ctx;
 	struct i915_wa_list ctx_wa_list;

drivers/gpu/drm/i915/gt/intel_execlists_submission.c

@@ -1252,6 +1252,11 @@ static unsigned long active_preempt_timeout(struct intel_engine_cs *engine,
 	return READ_ONCE(engine->props.preempt_timeout_ms);
 }
 
+static unsigned long work_period_timeslice(struct intel_engine_cs *engine)
+{
+	return GPU_WORK_PERIOD_EVENT_TIMEOUT;
+}
+
 static void set_preempt_timeout(struct intel_engine_cs *engine,
 				const struct i915_request *rq)
 {
@@ -2040,6 +2045,8 @@ process_csb(struct intel_engine_cs *engine, struct i915_request **inactive)
 			if (active_ce)
 				lrc_runtime_start(active_ce);
 		}
+		if (active_ce)
+			active_ce->start_time_ns = ktime_get_raw_ns();
 		new_timeslice(execlists);
 	}
 
@@ -2423,6 +2430,13 @@ static bool preempt_timeout(const struct intel_engine_cs *const engine)
 	return engine->execlists.pending[0];
 }
 
+static bool work_period_expired(const struct intel_engine_cs *const engine)
+{
+	const struct timer_list *t = &engine->execlists.work_period_timer;
+
+	return timer_expired(t);
+}
+
 /*
  * Check the unread Context Status Buffers and manage the submission of new
  * contexts to the ELSP accordingly.
@@ -2439,6 +2453,17 @@ static void execlists_submission_tasklet(struct tasklet_struct *t)
 	inactive = process_csb(engine, post);
 	GEM_BUG_ON(inactive - post > ARRAY_SIZE(post));
 
+	struct intel_context *ce = (*inactive)->context;
+	struct i915_engine_work *ew = &engine->gpu_work;
+	i915_gpu_work_process_ctx(ce, ew);
+
+	if (unlikely(work_period_expired(engine))) {
+		cancel_timer(&engine->execlists.work_period_timer);
+		schedule_work(&ew->event_work);
+		set_timer_ms(&engine->execlists.work_period_timer,
+				 work_period_timeslice(engine));
+	}
+
 	if (unlikely(preempt_timeout(engine))) {
 		const struct i915_request *rq = *engine->execlists.active;
 
@@ -2547,6 +2572,11 @@ static void execlists_preempt(struct timer_list *timer)
 	execlists_kick(timer, preempt);
 }
 
+static void execlists_work_period(struct timer_list *timer)
+{
+	execlists_kick(timer, work_period_timer);
+}
+
 static void queue_request(struct intel_engine_cs *engine,
 			  struct i915_request *rq)
 {
@@ -3543,6 +3573,8 @@ int intel_execlists_submission_setup(struct intel_engine_cs *engine)
 	tasklet_setup(&engine->sched_engine->tasklet, execlists_submission_tasklet);
 	timer_setup(&engine->execlists.timer, execlists_timeslice, 0);
 	timer_setup(&engine->execlists.preempt, execlists_preempt, 0);
+	timer_setup(&engine->execlists.work_period_timer, execlists_work_period, 0);
+
 
 	logical_ring_default_vfuncs(engine);
 	logical_ring_default_irqs(engine);

drivers/gpu/drm/i915/gt/intel_lrc.c

@@ -1946,6 +1946,7 @@ void lrc_update_runtime(struct intel_context *ce)
 
 	ewma_runtime_add(&stats->runtime.avg, dt);
 	stats->runtime.total += dt;
+	stats->runtime.dt = dt;
 }
 
 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)

drivers/gpu/drm/i915/i915_file_private.h

@@ -37,7 +37,6 @@ struct drm_i915_file_private {
 	 * See i915_gem_proto_context.
 	 */
 	struct mutex proto_context_lock;
-	u64 last_end_time;
 
 	/** @proto_context_xa: xarray of struct i915_gem_proto_context
 	 *

drivers/gpu/drm/i915/i915_gem.c

@@ -2180,7 +2180,6 @@ int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file)
 	file_priv->file = file;
 	file_priv->client = client;
 
-	file_priv->last_end_time = 0;
 	file_priv->bsd_engine = -1;
 	file_priv->hang_timestamp = jiffies;
 #if IS_ENABLED(CONFIG_DRM_I915_MEMTRACK)